NEC 78K0/KD1 Series User Manual page 281

8-bit single-chip microcontrollers
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(6) Asynchronous serial interface control register 6 (ASICL6)
This register controls the serial transfer operations of serial interface UART6.
ASICL6 can be set by a 1-bit transfer instruction or an 8-bit memory manipulation instruction.
RESET input sets this register to 16H.
Remark ASICL6 can be refreshed (the same value is written) by software during a communication operation
(when bit 7 (POWER6) and bit 6 (TXE6) of ASIM6 = 1 or bit 7 (POWER6) and bit 5 (RXE6) of ASIM6 =
1). However, transfer is started by refresh because bit 6 (SBRT6) and bit 5 (SBTT6) of ASICL6 are
cleared to 0 when communication is complete (when an interrupt signal is generated).
Figure 14-10. Format of Asynchronous Serial Interface Control Register 6 (ASICL6) (1/2)
Address: FF58H After reset: 16H R/W
Symbol
7
ASICL6
SBRF6
SBRF6
0
1
SBRT6
0
1
SBTT6
0
1
Note Bit 7 is read-only.
Cautions 1. In the case of an SBF reception error, return the mode to the SBF reception mode and hold
the status of the SBRF6 flag.
2. Before setting the SBRT6 bit, make sure that bit 7 (POWER6) and bit 5 (RXE6) of ASIM6 = 1.
3. The read value of the SBRT6 bit is always 0. SBRT6 is automatically cleared to 0 after SBF
reception has been correctly completed.
4. Before setting the SBTT6 bit to 1, make sure that bit 7 (POWER6) and bit 6 (TXE6) of ASIM6 =
1.
5. The read value of the SBTT6 bit is always 0. SBTT6 is automatically cleared to 0 at the end of
SBF transmission.
CHAPTER 14 SERIAL INTERFACE UART6
Note
6
5
SBRT6
SBTT6
If POWER6 = 0 and RXE6 = 0 or if SBF reception has been completed correctly
SBF reception in progress
SBF reception trigger
SBF transmission trigger
Preliminary User's Manual U16315EJ1V0UD
4
3
SBL62
SBL61
SBL60
SBF reception status flag
SBF reception trigger
SBF transmission trigger
2
1
0
DIR6
TXDLV6
281

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