NEC 78K0/KD1 Series User Manual page 167

(2) 8-bit timer mode control register 5n (TMC5n)
TMC5n is a register that performs the following five types of settings.
<1> 8-bit timer counter 5n (TM5n) count operation control
<2> 8-bit timer counter 5n (TM5n) operating mode selection
<3> Timer output F/F (flip-flop) status setting
<4> Active level selection in timer F/F control or PWM (free-running) mode
<5> Timer output control
TMC5n can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears this register to 00H.
Remark n = 0, 1
Figure 7-5. Format of 8-Bit Timer Mode Control Register 50 (TMC50)
Address: FF6BH After reset: 00H
Symbol 7
TMC50 TCE50
TCE50
0
1
TMC506
0
1
LVS50
0
0
1
1
TMC501
0
1
TOE50
0
1
Note Bits 2 and 3 are write-only.
(Refer to Caution and Remark on the page after the next.)
CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51
Note
R/W
6 5
TMC506 0
After clearing to 0, count operation disabled (counter stopped)
Count operation start
Mode in which clear & start occurs on a match between TM50 and CR50
PWM (free-running) mode
LVR50
0 No change
1 Timer output F/F reset (0)
0 Timer output F/F set (1)
1 Setting prohibited
In other modes (TMC506 = 0)
Timer F/F control
Inversion operation disabled
Inversion operation enabled
Output disabled (TO50 pin outputs the low level)
Output enabled
Preliminary User's Manual U16315EJ1V0UD
4 3 2
0 LVS50 LVR50
TM50 count operation control
TM50 operating mode selection
Timer output F/F status setting
In PWM mode (TMC506 = 1)
Active level selection
Active-high
Active-low
Timer output control
1 0
TMC501 TOE50
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