NEC 78K0/KD1 Series User Manual page 285

8-bit single-chip microcontrollers
Table of Contents

Advertisement

RXE6
0
Disables reception (synchronously resets the reception circuit).
1
Enables reception
PS61
0
0
1
1
CL6
0
Character length of data = 7 bits
1
Character length of data = 8 bits
SL6
0
Number of stop bits = 1
1
Number of stop bits = 2
ISRM6
0
"INTSRE6" occurs in case of error (at this time, INTSR6 does not occur).
1
"INTSR6" occurs in case of error (at this time, INTSRE6 does not occur).
Note If "reception as 0 parity" is selected, the parity is not judged. Therefore, bit 2 (PE6) of asynchronous serial
interface reception error status register 6 (ASIS6) is not set and the error interrupt does not occur.
Cautions 1. At startup, set POWER6 to 1 and then set RXE6 to 1. Clear RXE6 to 0 first, and then clear
POWER6 to 0.
2. Clear the TXE6 and RXE6 bits to 0 before rewriting the PS61, PS60, and CL6 bits.
3. Fix the PS61 and PS60 bits to 0 when mounting the device on LIN.
4. Make sure that TXE6 = 0 when rewriting the SL6 bit. Reception is always performed with "the
number of stop bits = 1", and therefore, is not affected by the set value of the SL6 bit.
5. Make sure that RXE6 = 0 when rewriting the ISRM6 bit.
CHAPTER 14 SERIAL INTERFACE UART6
PS60
Transmission operation
0
Does not output parity bit.
1
Outputs 0 parity.
0
Outputs odd parity.
1
Outputs even parity.
Specifies character length of transmit/receive data
Specifies number of stop bits of transmit data
Enables/disables occurrence of reception completion interrupt in case of error
Preliminary User's Manual U16315EJ1V0UD
Enables/disables reception
Reception without parity
Reception as 0 parity
Judges as odd parity.
Judges as even parity.
Reception operation
Note
285

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents