9.2 Configuration of Watch Timer
The watch timer consists of the following hardware.
Counter
Prescaler
Control register
9.3 Register Controlling Watch Timer
The watch timer is controlled by the watch timer operation mode register (WTM).
• • • • Watch timer operation mode register (WTM)
This register sets the watch timer count clock, enables/disables operation, prescaler interval time, and 5-bit
counter operation control.
WTM is set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears WTM to 00H.
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CHAPTER 9 WATCH TIMER
Table 9-3. Watch Timer Configuration
Item
5 bits × 1
11 bits × 1
Watch timer operation mode register (WTM)
Preliminary User's Manual U16315EJ1V0UD
Configuration