NEC 78K0/KD1 Series User Manual page 280

(5) Baud rate generator control register 6 (BRGC6)
This register selects the base clock of serial interface UART6.
BRGC6 can be set by an 8-bit memory manipulation instruction.
RESET input sets this register to FFH.
Remark BRGC6 can be refreshed (the same value is written) by software during a communication operation
(when bit 7 (POWER6) and bit 6 (TXE6) of ASIM6 = 1 or bit 7 (POWER6) and bit 5 (RXE6) of ASIM6
= 1).
Figure 14-9. Format of Baud Rate Generator Control Register 6 (BRGC6)
Address: FF57H After reset: FFH R/W
Symbol 7 6
BRGC6 MDL67 MDL66
MDL67 MDL66
0 0
0 0
0 0
0 0
• •
• •
• •
• •
• •
1 1
1 1
1 1
1 1
Cautions 1. Make sure that bit 6 (TXE6) and bit 5 (RXE6) of the ASIM6 register = 0 when rewriting the
MDL67 to MDL60 bits.
2. The baud rate value is the output clock of the 8-bit counter divided by 2.
Remarks 1. f : Frequency of base clock (Clock) selected by the TPS63 to TPS60 bits of CKSR6 register
XCLK
2. k: Value set by MDL67 to MDL60 bits (k = 8, 9, 10, ..., 255)
3. ×:
Don't care
280
CHAPTER 14 SERIAL INTERFACE UART6
5 4 3
MDL65 MDL64 MDL63
MDL65 MDL64 MDL63
0 0 0
0 0 1
0 0 1
0 0 1
• • •
• • •
• • •
• • •
• • •
1 1 1
1 1 1
1 1 1
1 1 1
Preliminary User's Manual U16315EJ1V0UD
2 1 0
MDL62 MDL61 MDL60
MDL62 MDL61 MDL60
× × ×
0 0 0
0 0 1
0 1 0
• • •
• • •
• • •
• • •
• • •
1 0 0
1 0 1
1 1 0
1 1 1
k Output clock selection of
8-bit counter
×
Setting prohibited
8 f /8
XCLK
9 f /9
XCLK
10 f /10
XCLK
• •
• •
• •
• •
• •
252 f /252
XCLK
253 f /253
XCLK
254 f /254
XCLK
255 f /255
XCLK