Internal Memory Size Switching Register - NEC 78K0/KD1 Series User Manual

8-bit single-chip microcontrollers
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25.1 Internal Memory Size Switching Register

The µ PD78F0124 allows users to select the internal memory capacity using the internal memory size switching
register (IMS) so that the same memory map as that of the mask ROM versions with a different internal memory
capacity can be achieved.
IMS is set by an 8-bit memory manipulation instruction.
RESET input sets IMS to CFH.
Caution Be sure to set the value of the relevant mask ROM version at initialization.
Figure 25-1. Format of Internal Memory Size Switching Register (IMS)
Address: FFF0H
After reset: CFH
Symbol
7
IMS
RAM2
RAM2
0
1
ROM3
0
0
0
1
The IMS settings required to obtain the same memory map as mask ROM versions are shown in Table 25-2.
Table 25-2. Internal Memory Size Switching Register Settings
Caution When using a mask ROM version, be sure to set the value indicated in Table 25-2 to IMS.
CHAPTER 25 µ µ µ µ PD78F0124
R/W
6
5
RAM1
RAM0
RAM1
RAM0
1
0
512 bytes
1
0
1024 bytes
Other than above
Setting prohibited
ROM2
ROM1
0
1
1
0
1
1
0
0
Other than above
Target Mask ROM Versions
µ PD780121
µ PD780122
µ PD780123
µ PD780124
Preliminary User's Manual U16315EJ1V0UD
4
3
2
0
ROM3
ROM2
Internal high-speed RAM capacity selection
ROM0
Internal ROM capacity selection
0
8 KB
0
16 KB
0
24 KB
0
32 KB
Setting prohibited
IMS Setting
42H
44H
C6H
C8H
1
0
ROM1
ROM0
385

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