Configuration Of Power-On-Clear Circuit; Operation Of Power-On-Clear Circuit - NEC V850E/RS1 User Manual

23.2 Configuration of Power-on-Clear Circuit

The block diagram of the power-on-clear circuit is shown in Figure 23-1.

23.3 Operation of Power-on-Clear Circuit

The power-on-clear circuit compares the supply voltage (V
generates an internal reset signal when V
Figure 23-2:
Supply voltage
POC detection
voltage (V
reset signal
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Chapter 23 Power-On-Clear Circuit
Figure 23-1: Block Diagram of Power-on-Clear Circuit
V
DD
Detection
voltage source
(V
POC
Timing of Internal Reset Signal Generation by Power-on-Clear Circuit
(V )
DD
)
POC
delay
Internal
Reset time
(without oscillation
stabilization )
+
–
)
) and detected voltage (V
DD
< V .
DD POC
Reset time
(without oscillation
stabilization )
User's Manual U16702EE3V2UD00
Internal reset signal
), and
POC
Time
Reset time
(without oscillation
stabilization )