Register Settings - NEC 78K0/KD1 Series User Manual

5.8.5 Register settings

f
CPU
Note 2
X1 input clock Ring-OSC oscillating
Ring-OSC stopped
Ring-OSC clock X1 oscillating
X1 stopped
Note 4
Subsystem clock X1 oscillating, Ring-OSC oscillating
X1 stopped, Ring-OSC oscillating
X1 oscillating, Ring-OSC stopped
X1 stopped, Ring-OSC stopped
Notes 1. Valid only when "clock can be stopped by software" is selected for Ring-OSC by a mask option.
2. Do not set MCC = 1 or MSTOP = 1 during X1 input clock operation (even if MCC = 1 or MSTOP = 1 is set,
the X1 oscillation does not stop).
3. Do not set MCC = 1 during Ring-OSC operation (even if MCC = 1 is set, the X1 oscillation does not stop).
To stop X1 oscillation during Ring-OSC operation, use MSTOP.
4. Shifting to subsystem clock operation mode must be performed from the X1 input clock operation mode.
From subsystem clock operation mode, only X1 input clock operation mode can be shifted to.
5. Do not set MCM0 = 0 (shifting to Ring-OSC operation) during subsystem clock operation.
6. Do not set MSTOP = 1 during subsystem clock operation (even if MSTOP = 1 is set, X1 oscillation does
not stop). To stop X1 oscillation during subsystem clock operation, use MCC.
128
CHAPTER 5 CLOCK GENERATOR
Table 5-7. Clock and Register Setting
Mode
PCC Register
MCC
0
0
0
Note 3
0
0
1
0
1
Preliminary User's Manual U16315EJ1V0UD
Setting Flag
MCM MOC
Register Register Register
CSS MCM0 MSTOP RSTOP
0 1 0
0 1 0
0 0 0
0 0 1
Note 5 Note 6
1 1 0
Note 5 Note 6
1 1 0
Note 5 Note 6
1 1 0
Note 5 Note 6
1 1 0
Status Flag
RCM PCC MCM
Register Register
Note 1
CLS MCS
0 0 1
1 0 1
0 0 0
0 0 0
0 1 1
0 1 1
1 1 1
1 1 1