NEC 78K0/KD1 Series User Manual page 121

Table 5-3. Relationship Between Operation Clocks in Each Operation Status
Status
X1
Oscillator
Operation
Mode
Reset Stopped
STOP
HALT Oscillating
Caution The RSTOP setting is valid only when "Can be stopped by software" is set for Ring-OSC by a mask
option.
Notes 1. When "Cannot be stopped" is selected for Ring-OSC by a mask option.
2. When "Can be stopped by software" is selected for Ring-OSC by a mask option.
3. Operates using the CPU clock at STOP instruction execution.
4. Operates using the CPU clock at HALT instruction execution.
Remark RSTOP: Bit 0 of the Ring-OSC mode register (RCM)
MCM0: Bit 0 of the main clock mode register (MCM)
Table 5-4. Oscillation Control Flags and Clock Oscillation Status
Note
MSTOP = 1 RSTOP = 0
RSTOP = 1
Note
MSTOP = 0 RSTOP = 0
RSTOP = 1
Note
MCC = 1 RSTOP = 0
RSTOP = 1
Note
MCC = 0 RSTOP = 0
RSTOP = 1
Note Setting X1 oscillator oscillating/stopped differs depending on the CPU clock used.
• When the Ring-OSC clock is used as the CPU clock: Set using the MSTOP bit
• When the subsystem clock is used as the CPU clock: Set using the MCC bit
Caution The RSTOP setting is valid only when "Can be stopped by software" is set for Ring-OSC
by a mask option.
Remark MSTOP: Bit 7 of the main OSC control register (MOC)
MCC:
RSTOP: Bit 0 of the Ring-OSC mode register (RCM)
CHAPTER 5 CLOCK GENERATOR
Ring-OSC Oscillator
Note 1 Note 2
RSTOP = 0 RSTOP = 1
Stopped
Oscillating Oscillating Stopped
X1 Oscillator
Stopped
Setting prohibited
Oscillating
Stopped
Oscillating
Bit 7 of the processor clock control register (PCC)
Preliminary User's Manual U16315EJ1V0UD
Subsystem CPU Clock Prescaler Clock Supplied
Clock After
Oscillator Release
Stopped Ring-OSC Stopped
Oscillating Note 3 Stopped
Note 4 Ring-OSC
Ring-OSC Oscillator
Oscillating
Oscillating
Stopped
Oscillating
Stopped
Oscillating
Stopped
to Peripherals
MCM0 = 0 MCM0 = 1
X1
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