NEC 78K0/KD1 Series User Manual page 23

8-bit single-chip microcontrollers
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Table No.
12-3
A/D Converter Sampling Time and A/D Conversion Start Delay Time (ADM Set Value) .......................... 244
13-1
Configuration of Serial Interface UART0 ................................................................................................... 246
13-2
Cause of Reception Error.......................................................................................................................... 261
13-3
Set Data of Baud Rate Generator ............................................................................................................. 265
13-4
Maximum/Minimum Permissible Baud Rate Error..................................................................................... 267
14-1
Configuration of Serial Interface UART6 ................................................................................................... 272
14-2
Write Processing and Writing to TXB6 During Execution of Continuous Transmission............................. 294
14-3
Cause of Reception Error.......................................................................................................................... 299
14-4
Set Data of Baud Rate Generator ............................................................................................................. 307
14-5
Maximum/Minimum Permissible Baud Rate Error..................................................................................... 309
15-1
Configuration of Serial Interface CSI10 ..................................................................................................... 311
16-1
Interrupt Source List .................................................................................................................................. 325
16-2
Flags Corresponding to Interrupt Request Sources .................................................................................. 328
16-3
Ports Corresponding to EGPn and EGNn ................................................................................................. 332
16-4
Time from Generation of Maskable Interrupt Request Until Servicing....................................................... 334
16-5
Interrupt Request Enabled for Multiple Interrupt Servicing During Interrupt Servicing .............................. 337
17-1
Assignment of Key Interrupt Detection Pins .............................................................................................. 341
17-2
Configuration of Key Interrupt ................................................................................................................... 341
18-1
Relationship Between HALT Mode, STOP Mode, and Clock .................................................................... 343
18-2
Operating Statuses in HALT Mode............................................................................................................ 347
18-3
Operation After HALT Mode Release........................................................................................................ 350
18-4
Operating Statuses in STOP Mode ........................................................................................................... 351
18-5
Operation After STOP Mode Release ....................................................................................................... 353
19-1
Hardware Statuses After Reset................................................................................................................. 357
19-2
RESF Status When Reset Request Is Generated..................................................................................... 359
20-1
Configuration of Clock Monitor .................................................................................................................. 360
20-2
Operation Status of Clock Monitor (When CLME = 1)............................................................................... 362
24-1
Flash Memory Versions Supporting Mask Options of Mask ROM Versions.............................................. 383
Differences Between µ PD78F0124 and Mask ROM Versions .................................................................. 384
25-1
25-2
Internal Memory Size Switching Register Settings.................................................................................... 385
25-3
Communication Mode List......................................................................................................................... 386
25-4
Main Functions of Flash Memory Programming........................................................................................ 387
26-1
Operand Identifiers and Specification Methods......................................................................................... 395
LIST OF TABLES (2/3)
Title
Preliminary User's Manual U16315EJ1V0UD
Page
23

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