When Subsystem Clock Is Not Used; Ring-Osc Oscillator; Prescaler; Clock Generator Operation - NEC 78K0/KD1 Series User Manual

5.4.3 When subsystem clock is not used

If it is not necessary to use the subsystem clock for low power consumption operations and watch operations,
connect the XT1 and XT2 pins as follows.
XT1: Connect to EV or V
DD
XT2: Leave open
In this state, however, some current may leak via the on-chip feedback resistor of the subsystem clock oscillator
when the X1 input clock and Ring-OSC clock stop. To minimize leakage current, the above on-chip feedback resistor
can be set not to be used via bit 6 (FRC) of the processor clock control register (PCC). In this case also, connect the
XT1 and XT2 pins as described above.

5.4.4 Ring-OSC oscillator

Ring-OSC oscillator is incorporated in this product.
"Can be stopped by software" or "Cannot be stopped" can be selected by a mask option. The Ring-OSC clock
always oscillates after RESET release (240 kHz (TYP.)).

5.4.5 Prescaler

The prescaler generates various clocks by dividing the X1 oscillator output (f
as the clock to be supplied to the CPU.
Caution When the Ring-OSC clock is selected as the clock supplied to the CPU, the prescaler generates
various clocks by dividing the Ring-OSC oscillator output (f

5.5 Clock Generator Operation

The clock generator generates the following clocks and controls the operation modes of the CPU, such as standby
mode.
• X1 input clock f
XP
• Ring-OSC clock f
R
• Subsystem clock f
XT
• CPU clock f
CPU
• Clock to peripheral hardware
The CPU starts operation when the on-chip Ring-OSC oscillator starts outputting after reset release in the
78K0/KD1 Series, thus enabling the following.
(1) Enhancement of security function
When the X1 input clock is set as the CPU clock by the default setting, the device cannot operate if the X1 input
clock is damaged or badly connected and therefore does not operate after reset is released. However, the start
clock of the CPU is the on-chip Ring-OSC clock, so the device can be started by the Ring-OSC clock after reset
release by the clock monitor (detection of X1 input clock stop). Consequently, the system can be safely shut
down by performing a minimum operation, such as acknowledging a reset source by software or performing
safety processing when there is a malfunction.
CHAPTER 5 CLOCK GENERATOR
DD
Preliminary User's Manual U16315EJ1V0UD
) when the X1 input clock is selected
X
) (f = 240 kHz (TYP.)).
X X
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