NEC 78K0/KD1 Series User Manual page 190

<4> When 8-bit timer counter Hn and the CMP1n register match, TOHn output becomes inactive and the
compare register to be compared with 8-bit timer counter Hn is changed from the CMP1n register to the
CMP0n register.
generated.
<5> By performing procedures <3> and <4> repeatedly, a pulse with an arbitrary duty ratio can be obtained.
<6> To stop the count operation, set TMHEn = 0.
If the setting value of the CMP0n register is N, the setting value of the CMP1n register is M, and the count clock
frequency is f , the PWM pulse output cycle and duty ratio are as follows.
CNT
PWM pulse output cycle = (N+1)/f
Duty ratio = Inactive width : Active width = (M + 1) : (N – M)
Cautions 1. In PWM mode, three operation clocks (signal selected using the CKSn2 to CKSn0 bits of the
TMHMDn register) are required to transfer the CMP1n register value after rewriting the
register.
2. Be sure to set the CMP1n register when starting the timer count operation (TMHEn = 1) after
the timer count operation was stopped (TMHEn = 0) (be sure to set again even if setting the
same value to the CMP1n register).
190
CHAPTER 8 8-BIT TIMERS H0 AND H1
At this time, 8-bit timer counter Hn is not cleared and the INTTMHn signal is not
CNT
Preliminary User's Manual U16315EJ1V0UD