NEC 78K0/KD1 Series User Manual page 329

(1) Interrupt request flag registers (IF0L, IF0H, IF1L)
The interrupt request flags are set to 1 when the corresponding interrupt request is generated or an instruction is
executed. They are cleared to 0 when an instruction is executed upon acknowledgment of an interrupt request or
upon RESET input.
IF0L, IF0H, and IF1L are set by a 1-bit or 8-bit memory manipulation instruction. When IF0L and IF0H are
combined to form 16-bit register IF0, they are set by a 16-bit memory manipulation instruction.
RESET input clears these registers to 00H.
Figure 16-2. Format of Interrupt Request Flag Registers (IF0L, IF0H, IF1L)
Address: FFE0H After reset: 00H R/W
Symbol 7
IF0L SREIF6
Address: FFE1H After reset: 00H
Symbol 7
IF0H TMIF010
Address: FFE2H After reset: 00H
Symbol 7
Note
IF1L 0
XXIFX
0
1
Note Be sure to set bit 7 of IF1L to 0.
Cautions 1. When operating a timer, serial interface, or A/D converter after standby release, operate it
once after clearing the interrupt request flag. An interrupt request flag may be set by noise.
2. When an interrupt is acknowledged, the interrupt request flag is automatically cleared and
then the interrupt routine is entered.
CHAPTER 16 INTERRUPT FUNCTIONS
6 5
PIF5 PIF4
R/W
6 5
TMIF000 TMIF50 TMIFH0
R/W
6 5
PIF6 WTIF
No interrupt request signal is generated
Interrupt request is generated, interrupt request status
Preliminary User's Manual U16315EJ1V0UD
4 3 2
PIF3 PIF2 PIF1
4 3 2
TMIFH1 DUALIF0
4 3 2
KRIF TMIF51 WTIIF
Interrupt request flag
1 0
PIF0 LVIIF
1 0
STIF6 SRIF6
1 0
SRIF0 ADIF
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