NEC 78K0/KD1 Series User Manual page 259

(c) Transmission
The T D0 pin outputs a high level when bit 7 (POWER0) of asynchronous serial interface mode register 0
X
(ASIM0) is set to 1. If bit 6 (TXE0) of ASIM0 is then set to 1, transmission is enabled. Transmission can be
started by writing transmit data to transmit shift register 0 (TXS0). The start bit, parity bit, and stop bit are
automatically appended to the data.
When transmission is started, the start bit is output from the T
order starting from the LSB. When transmission is completed, the parity and stop bits set by ASIM0 are
appended and a transmission completion interrupt request (INTST0) is generated.
Transmission is stopped until the data to be transmitted next is written to TXS0.
Figure 13-7 shows the timing of the transmission completion interrupt request (INTST0). This interrupt
occurs as soon as the last stop bit has been output.
Caution After transmit data is written to TXS0, do not write the next transmit data before the
transmission completion interrupt signal (INTST0) is generated.
Figure 13-7. Normal Transmission Completion Interrupt Request Timing
1. Stop bit length: 1
T D0 (output)
X
INTST0
2. Stop bit length: 2
T D0 (output)
X
INTST0
CHAPTER 13 SERIAL INTERFACE UART0
START D0 D1 D2
START D0 D1 D2
Preliminary User's Manual U16315EJ1V0UD
D0 pin, followed by the rest of the data in
X
Parity
D6 D7 STOP
D6 D7 Parity STOP
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