Reset; Regc; X1 And X2; Xt1 And Xt2 - NEC 78K0/KD1 Series User Manual

2.2.12 RESET

This is the active-low system reset input pin.

2.2.13 REGC

This is the pin for connecting the capacitor for the regulator. Connect this pin to V
the CPU at high speed (f
XP
to it as the V pin.
DD

2.2.14 X1 and X2

These are the pins for connecting a crystal resonator for X1 input clock oscillation.
When supplying an external clock, input a signal to the X1 pin and input the inverse signal to the X2 pin.

2.2.15 XT1 and XT2

These are the pins for connecting a crystal resonator for subsystem clock oscillation.
When supplying an external clock, input a signal to the XT1 pin and input the inverse signal to the XT2 pin.
2.2.16 V and EV
DD DD
V is the positive power supply pin for other than ports.
DD
EV is the positive power supply pin for ports.
DD
2.2.17 V and EV
SS SS
V is the ground potential pin for other than ports.
SS
EV is the ground potential pin for ports.
SS
2.2.18 V (flash memory versions only)
PP
This is a pin for flash memory programming mode setting and high-voltage application for program write/verify.
Connect directly to EV
SS

2.2.19 IC (mask ROM versions only)

The IC (Internally Connected) pin is provided to set the test mode to check the 78K0/KD1 Series at shipment.
Connect it directly to EV
SS
When a potential difference is produced between the IC pin and the EV
these two pins is too long or external noise is input to the IC pin, the user's program may not operate normally.
42
CHAPTER 2 PIN FUNCTIONS
= 10 MHz, V = 4.0 to 5.5 V), connect this pin directly to V
DD
or V in the normal operation mode.
SS
or V pin with the shortest possible wire in the normal operation mode.
SS
• Connect the IC pin directly to EV
EV or V
SS SS
Preliminary User's Manual U16315EJ1V0UD
or V
SS
or V pin.
SS SS
IC
As short as possible
via a 0.1 µ F capacitor. To use
SS
and apply the same potential
DD
pin because the wiring between
SS