NEC 78K0/KD1 Series User Manual page 372

8-bit single-chip microcontrollers
Table of Contents

Advertisement

(1) Low-voltage detection register (LVIM)
This register sets low-voltage detection and the operation mode.
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears LVIM to 00H.
Figure 22-2. Format of Low-Voltage Detection Register (LVIM)
Address: FFBEH
After reset: 00H
7
Symbol
LVION
LVIM
Notes 2, 3
LVION
0
Disables operation
1
Enables operation
Notes 2, 4, 5
LVIE
0
Disables operation
1
Enables operation
Note 2
LVIMD
0
Generates interrupt signal when supply voltage (V
1
Generates internal reset signal when supply voltage (V
Note 6
LVIF
0
Supply voltage (V
1
Supply voltage (V
Notes 1.
Bit 0 is read-only.
2.
LVION, LVIE, and LVIMD are cleared to 0 at a reset other than an LVI reset. These are not
cleared to 0 at an LVI reset.
3.
When LVION is set to 1, operation of the comparator in the LVI circuit is started. Use
software to instigate a wait of at least 0.2 ms from when LVION is set to 1 until the voltage is
confirmed at LVIF.
4.
When LVIE is set to 1, a reference voltage generator operation in the LVI circuit is started.
Use software to instigate a wait of at least 2 ms from when LVIE is set to 1 until LVION is set
to 1.
5.
If "use POC" is selected by a mask option, leave LVIE as 0. A wait time (2 ms) until LVION is
set to 1 is not necessary.
6.
The value of LVIF is output as the interrupt request signal INTLVI when LVION = 1 and
LVIMD = 0.
Caution To stop LVI, follow either of the procedures below.
• • • • When using 8-bit manipulation instruction: Write 00H to LVIM.
• • • • When using 1-bit memory manipulation instruction: Clear LVION to 0 first and then
372
CHAPTER 22 LOW-VOLTAGE DETECTOR
Note 1
R/W
6
5
4
0
0
LVIE
Enables low-voltage detection operation
Specifies reference voltage generator
Low-voltage detection operation mode selection
Low-voltage detection flag
) > detection voltage (V
DD
) < detection voltage (V
DD
Preliminary User's Manual U16315EJ1V0UD
3
2
1
0
0
LVIMD
) < detection voltage (V
DD
) < detection voltage (V
DD
), or when operation is disabled
LVI
)
LVI
clear LVIE to 0.
0
LVIF
)
LVI
)
LVI

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents