Chapter 1 Outline; Features - NEC 78K0/KD1 Series User Manual

1.1 Features

ROM, RAM capacities
Part Number
µ PD780121
µ PD780122
µ PD780123
µ PD780124
µ PD78F0124
Note The internal flash memory and internal high-speed RAM capacities can be changed using the internal
memory size switching register (IMS).
On-chip power-on-clear (POC) circuit and low-voltage detector (LVI)
Short startup is possible via the CPU default start using the on-chip Ring-OSC
On-chip clock monitor function using on-chip Ring-OSC
On-chip watchdog timer (operable with Ring-OSC clock)
On-chip UART supporting LIN (Local Interconnect Network) bus
On-chip key interrupt function
On-chip clock output controller
On-chip regulator
Minimum instruction execution time can be changed from high speed (0.2 µ s: @ 10 MHz operation with X1
input clock) to ultra low-speed (122 µ s: @ 32.768 kHz operation with subsystem clock)
I/O ports: 39 (N-ch open drain: 4)
Timer: 7 channels
Serial interface: 2 channels
(UART: 1 channel, CSI/UART
10-bit resolution A/D converter: 8 channels
Supply voltage: V
DD
Note Select either of the functions of these alternate-function pins.

CHAPTER 1 OUTLINE

Item
Mask ROM
Flash memory
Note
: 1 channel)
= 2.7 to 5.5 V
Preliminary User's Manual U16315EJ1V0UD
Program Memory
(ROM)
8 KB
16 KB
24 KB
32 KB
Note
32 KB
Data Memory
Internal High-Speed RAM
512 bytes
1024 bytes
Note
1024 bytes
25