Asynchronous Serial Interface (Uart) Mode - NEC 78K0/KD1 Series User Manual

8-bit single-chip microcontrollers
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14.4.2 Asynchronous serial interface (UART) mode

In this mode, data of 1 byte is transmitted/received following a start bit, and a full-duplex operation can be
performed.
A dedicated UART baud rate generator is incorporated, so that communication can be executed at a wide range of
baud rates.
(1) Register setting
The UART mode is set by asynchronous serial interface operation mode register 6 (ASIM6), asynchronous serial
interface reception error status register 6 (ASIS6), asynchronous serial interface transmission status register 6
(ASIF6), and asynchronous serial interface control register 6 (ASICL6).
(a) Asynchronous serial interface operation mode register 6 (ASIM6)
This 8-bit register controls the serial transfer operations of serial interface UART6.
ASIM6 can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input sets this register to 01H.
Remark ASIM6 can be refreshed (the same value is written) by software during a communication operation
(when bit 7 (POWER6) and bit 6 (TXE6) of ASIM6 = 1 or bit 7 (POWER6) and bit 5 (RXE6) of
ASIM6 = 1).
Address: FF50H After reset: 01H R/W
Symbol
7
ASIM6
POWER6
POWER6
Note 1
0
Note 2
1
TXE6
0
1
Notes 1.
The output of the T
POWER6 = 0.
2.
Operation of the internal operation clock is enabled at the second input clock after 1 is written to the
POWER6 bit.
Caution At startup, set POWER6 to 1 and then set TXE6 to 1. Clear TXE6 to 0 first, and then clear
POWER6 to 0.
284
CHAPTER 14 SERIAL INTERFACE UART6
6
5
TXE6
RXE6
Enables/disables operation of internal operation clock
Disables operation of the internal operation clock (fixes the clock to low level) and asynchronously
resets the internal circuit.
Enables operation of the internal operation clock.
Disables transmission (synchronously resets the transmission circuit).
Enables transmission
D6 pin goes high and the input from the R
X
Preliminary User's Manual U16315EJ1V0UD
4
3
PS61
PS60
CL6
Enables/disables transmission
D6 pin is fixed to the high level when
X
2
1
0
SL6
ISRM6

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