NEC 78K0/KD1 Series User Manual page 277

(2) Asynchronous serial interface reception error status register 6 (ASIS6)
This register indicates an error status on completion of reception by serial interface UART6. It includes three
error flag bits (PE6, FE6, OVE6).
This register can be set by an 8-bit memory manipulation instruction and is read-only.
RESET input clears this register to 00H if bit 7 (POWER6) and bit 5 (RXE6) of ASIM6 = 0. 00H is read when this
register is read.
Figure 14-6. Format of Asynchronous Serial Interface Reception Error Status Register 6 (ASIS6)
Address: FF53H After reset: 00H R
Symbol 7
ASIS6 0
PE6
0
1
FE6
0
1
OVE6
0
1
Cautions 1. The operation of the PE6 bit differs depending on the set values of the PS61 and PS60 bits of
asynchronous serial interface operation mode register 6 (ASIM6).
2. The first bit of the receive data is checked as the stop bit, regardless of the number of stop
bits.
3. If an overrun error occurs, the next receive data is not written to receive buffer register 6
(RXB6) but discarded.
4. If data is read from ASIS6, a wait cycle is generated. Do not read data from ASIS6 when the
CPU is operating on the subsystem clock and the X1 input clock is stopped. For details, refer
to CHAPTER 29 CAUTIONS FOR WAIT.
CHAPTER 14 SERIAL INTERFACE UART6
6 5
0 0
If POWER6 = 0 and RXE6 = 0, or if ASIS6 register is read
If the parity of transmit data does not match the parity bit on completion of reception
If POWER6 = 0 and RXE6 = 0, or if ASIS6 register is read
If the stop bit is not detected on completion of reception
If POWER6 = 0 and RXE6 = 0, or if ASIS6 register is read
If receive data is set to the RXB register and the next reception operation is completed before the
data is read.
Preliminary User's Manual U16315EJ1V0UD
4 3
0 0 PE6
Status flag indicating parity error
Status flag indicating framing error
Status flag indicating overrun error
2 1 0
FE6 OVE6
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