4.4.3
Using Open-Loop Configuration for Multiple HPs and Mics
The open-loop configuration shown in
DACB−
DACB+
DACA−
DACA+
HS Bias
Generator
This approach requires half the number of switches, saving PCB space and cost, addressing routing concerns, and
decreasing the total capacitance. The drawback is that the feedback points do not account for switch characteristics, which
leads to significantly degraded THD performance and an increased reduction in voltage appearing at the headphone
connector. Due to these factors, this open-loop approach is not recommended for general use.
The closed-loop approach feedback point is taken at the connector. This forces the HP output amplifier to correct for switch
characteristics even though the maximum output voltage swing is the same for both configurations. Additionally, the HSx_
REF connection point is also at the connector in the closed-loop configuration, which improves HP performance over the
open-loop method. Together, the closed-loop configuration results in the best performance if switches must be used.
4.4.4
Output Load Detection
The CS42L42 can distinguish between the following output loads:
•
R
= 15, 30, or 3 k
L
•
C
< ~2 nF (low capacitance); C
L
Note:
Channels A and B must have matching loads, although load detection is performed using Channel A.
Before output load detection is initiated, the following steps must be performed:
1. HS-type information must be determined to run a headset load-detection sequence, as described in
2. Power down the ADC and HP blocks:
3. Mute the analog outputs:
4. Disable the DAC high-pass filter:
Note: Restore the previous setup after detection completes.
DS1083F2
Fig. 4-11
offers another way to support multiple headphones and microphones.
CS42L42
HPSENSB
–
HPOUTB
+
HPSENSA
–
HPOUTA
+
HS3_REF
HS4_REF
HSIN+
HSIN−
HS3
HS4
HS_CLAMP1
HS_CLAMP2
GNDHS
Figure 4-11. Open-Loop Configuration
> ~2 nF (high capacitance)
L
ADC_PDN
ANA_MUTE_B
=
ANA_MUTE_A
DAC_HPF_EN
External
Switch
Bank 1
External
Switch
Bank 2
= 1,
HP_PDN
= 1 (see
p.
= 1 (see
p.
155).
= 0 (see
p.
154).
4.4 Analog Output
Headset
Connector 1
SW1
SW2
1
2
3
SW3
SW4
Headset
Connector 2
SW1
SW2
1
2
3
SW3
SW4
130).
CS42L42
4
4
Section
4.13.
38
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