8 PCB Layout Considerations
The following sections provide general guidelines for PCB layout to ensure the best performance of the CS42L42.
8.1 Power Supply
As with any high-resolution converter, to realize its potential, the CS42L42 requires careful attention to power supply and
grounding arrangements.
to clean supplies. VL, which powers the digital circuitry, may be run from the system logic supply. Alternatively, VL may
be powered from the analog supply via a ferrite bead. In this case, no additional devices should be powered from VL.
8.2 Grounding
Note the following:
•
Extensive use of power and ground planes, ground-plane fill in unused areas, and surface-mount decoupling
capacitors are recommended.
•
Decoupling capacitors should be as close as possible to the CS42L42 pins.
•
To minimize inductance effects, the low-value ceramic capacitor must be closest to the pin and mounted on the
same side of the board as the CS42L42.
•
To avoid unwanted coupling into the modulators, all signals, especially clocks, must be isolated from the FILT+ pin.
•
The FILT+ capacitor must be positioned to minimize the electrical path from the pin to GNDA.
•
The +VCP_FILT and –VCP_FILT capacitors must be positioned to minimize the electrical path from each respective
pin to GNDCP.
8.3 QFN Thermal Pad
The CS42L42 comes in a compact QFN package, the underside of which reveals a large metal pad that serves as a
thermal relief to provide maximum heat dissipation. This pad must mate with a matching copper pad on the PCB and must
be electrically connected to ground. A series of vias should be used to connect this copper pad to one or more larger
ground planes on other PCB layers. For best performance in split-ground systems, connect this thermal to GNDA.
DS1083F2
Fig. 2-1
and
Fig. 2-2
show the recommended power arrangements, with VA and VCP connected
CS42L42
8 PCB Layout Considerations
169
Need help?
Do you have a question about the CS42L42 and is the answer not in the manual?