Headset Bias Registers - Cirrus Logic CS42L42 Manual

7.9.10 Detect Interrupt Mask 1
R/W
7
M_HSBIAS_SENSE M_TIP_SENSE_PLUG M_TIP_SENSE_UNPLUG
Default
1
Interrupt mask register bits serve as a mask for the interrupt sources in the interrupt status registers. Interrupts are described in
Bits Name
7 M_HSBIAS_ HSBIAS_SENSE mask
SENSE
0 Unmasked
1 (Default) Masked
6 M_TIP_ TIP_SENSE_PLUG mask
SENSE_
0 Unmasked
PLUG
1 (Default) Masked
5 M_TIP_ TIP_SENSE_UNPLUG mask
SENSE_
0 Unmasked
UNPLUG
1 (Default) Masked
4:0 — Reserved
7.9.11 Detect Interrupt Mask 2
R/W
7
M_DETECT_ M_DETECT_
TRUE_FALSE FALSE_TRUE
Default 1
Interrupt mask register bits serve as a mask for the interrupt sources in the interrupt status registers. Interrupts are described in
Bits Name
7 M_DETECT_ DETECT_TRUE_FALSE mask
TRUE_
0 Unmasked
FALSE
1 (Default) Masked
6 M_DETECT_ DETECT_FALSE_TRUE mask
FALSE_
0 Unmasked
TRUE
1 (Default) Masked
5:2 — Reserved
2 M_HSBIAS_ HSBIAS_HIZ mask
HIZ
0 Unmasked
1 (Default) Masked
1 M_SHORT_ SHORT_RELEASE mask. A shadow register for this bit captures up to two button-press events. Reading the register
RELEASE once transfers the contents of the shadow register into this one; therefore, it can be read twice per interrupt event. Shadow
bits are not available in Wake Mode (only VP present).
0 Unmasked
1 (Default) Masked
0 M_SHORT_ SHORT_DETECTED mask. This bit is affected by
DETECTED
0 Unmasked
1 (Default) Masked

7.10 Headset Bias Registers

7.10.1 Headset Bias Control
R/W
7
HSBIAS_CAPLESS_EN
Default
1
Bits Name
7 HSBIAS_ HSBIAS capless enable. Indicates whether there is a capacitive load on HS bias output.
CAPLESS_
0 External capacitor present
EN
1 (Default) No external capacitor (Default because there is no pin on HS bias output)
6:5 — Reserved
DS1083F2
6
1
6 5
1 1
6 5
—
1 0
5 4
1 0
Description
4 3
— M_HSBIAS_HIZ
1 1
Description
LATCH_TO_VP (see
4 3
HSBIAS_PD
0 0
Description
7.10 Headset Bias Registers
3 2 1
—
0 0 0
2 1
M_SHORT_
RELEASE
1 1
p. 150).
2 1
— HSBIAS_RAMP
0 1
CS42L42
Address 0x1B79
0
0
Section 4.18.
Address 0x1B7A
0
M_SHORT_
DETECTED
1
Section 4.18.
Address 0x1C03
0
0
152