Three-Band Equalizer - Cirrus Logic CS42L42 Manual

Low-power audio codec with soundwire-i2s/tdm and audio processing
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4.2.2
Mixer Attenuation Values
The digital mixer contains programmable attenuation blocks that are configured as described in the MIXER_CHx_VOLy
field descriptions in
Section 7.15.1—Section
an offset that increases as attenuation increases, as follows:
For commonly used –6n dB (n 1, 2, etc.}) attenuation settings, the offset rounds the attenuation exactly to the
n
desired 1/2
factor (e.g., 20Log(1/2) = 6.021 dB, not 6.000 dB).
For attenuation settings other than –6n dB, the always positive offset provides slightly more attenuation, giving
enough margin to avoid mixer clipping.

4.3 Three-Band Equalizer

The mono equalizer connects as shown in
that can be independently configured in any of the following: low-pass filter (LPF), high-pass filter (HPF), all-pass filter (APF),
band-pass filter (BPF), notch filter (NF), peaking EQ (PEQ), low-shelving EQ (LSEQ), or high-shelving EQ (HSEQ).
ADC or Wind-
Noise Filter
The three filter banks are cascaded, such that the Filter Bank 1 output is the input to Filter Bank 2, and so on. Therefore,
the overall transfer function is the product of the three functions: H
implemented as Direct Form II transposed, as shown in
From previous filter
bank output
Eq. 4-1
represents the filter bank architecture, where y[n] represents the output sample value and x[n] represents the input sample value.
Note:
If the conventional difference equation is used to calculate coefficients, coefficients a1 and a2 must be inverted
before writing them.
DS1083F2
7.15.3. For all settings except 0 dB, attenuation on the mixer input includes
Fig.
4-5. The equalizer input enters three fully programmable parametric filter banks
Equalizer
Bank 1
H
(z)
1
Figure 4-5. Three-Band Equalizer
N
x[n]
b
0
b
1
b
2
Figure 4-6. Direct Form II Transposed Filter Bank Architecture
y[n] = b
x[n] + b
x[n – 1] + b
0
1
Equation 4-1. Filter Equation
Bank 2
Bank 3
H
(z)
H
(z)
2
3
(z) • H
(z) • H
1
2
Fig.
4-6.
N = # of data bits
H
(z)
x
M = # of coefficient bits
N+M+2
N+M+2
Truncation
N
-1
Z
N
Truncation
N+M+2
N+M+2
a
1
N
Z
-1
N
Truncation
N+M+2
N+M+2
a
2
x[n – 2] + a
y[n – 1] + a
2
1
4.3 Three-Band Equalizer
Digital Mixer
(z), as shown in
Fig.
4-5. Each bank is
3
N
y[n]
To next filter
bank input
y
2
CS42L42
33

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