Adc Registers - Cirrus Logic CS42L42 Manual

Low-power audio codec with soundwire-i2s/tdm and audio processing
Table of Contents

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Bits
Name
4
HSBIAS_
HSBIAS pull down. Used to enable a 60-k pulldown on HS bias.
PD
0 (Default) Pulldown resistor off
1 Pulldown resistor on
Reserved
3:2
1:0
HSBIAS_
HSBIAS ramp rate. Sets bidirectional output ramp rate between ground and set level. See
RAMP
Note: After setting HSBIAS_RAMP and powering up the mic bias
changed until the ramp delay count is reached. Approximate ramp delay counts for HS_BIAS_RAMP = 00/01/10/11 are,
respectively, 10/40/90/170 ms. After the ramp delay count,
00 Fast rise time; slow, load-dependent fall time.
01 Fast

7.11 ADC Registers

7.11.1 ADC Control
R/W
7
Default
0
Bits
Name
5
ADC_
ADC digital notch filter disable. Disables the digital notch filter on the ADC.
NOTCH_
0 (Default) Enabled
DIS
1 Disabled
4
ADC_
ADC force analog input weak VCM. Controls the status of the weak VCM for the analog input.
FORCE_
0 (Default) Normal operation
WEAK_VCM
1 Forced on
3
Reserved
2
ADC_INV
ADC invert signal polarity. Configures the polarity of the ADC signal. See
0 (Default) Not inverted
1 Inverted
3
Reserved
0
ADC_DIG_
ADC digital boost. Configures a +20-dB digital boost on the ADC. See
BOOST
0 (Default) No boost applied
1 +20-dB digital boost applied
7.11.2 ADC Soft-Ramp Enable
R/W
7
Default
0
Bits
Name
7:3
Reserved
2
ADC_
ADC soft-ramp enable. Digital soft ramp enable bit for ADC.
SOFTRAMP_
0 (Default) Disabled
EN
1 Enabled. The soft-ramp rate is set by DSR_RATE
1:0
Reserved
7.11.3 ADC Volume
R/W
7
Default
0
Bits Name
7:0
ADC_
ADC volume. ADC digital volume. Sets the ADC signal volume. Step size: 1.0 dB
VOL
0111 1111–0000 1100 +12 dB
0000 1011 +11 dB ...
DS1083F2
6
5
ADC_NOTCH_
ADC_FORCE_
DIS
WEAK_VCM
0
0
6
5
0
0
6
5
0
0
0000 0000 (Default) 0 dB
1111 1111 –1.0 dB
Description
HSBIAS_CTRL
HS_TRUE
and
SHORT_TRUE
10 (Default) Slow
11 Slowest
4
3
ADC_INV
0
0
Description
Section 4.13.1
Section 4.1.3
4
3
SOFTRAMP_EN
0
0
Description
4
3
ADC_VOL
0
0
Description
1111 1110 –2.0 dB ...
1010 0000 –96.0 dB
CS42L42
7.11 ADC Registers
Table 3-15
for specifications.
(see
p.
150), HSBIAS_RAMP cannot be
(see
p.
151) become valid.
Address 0x1D01
2
1
0
0
for details.
for details.
Address 0x1D02
2
1
ADC_
0
1
Address 0x1D03
2
1
0
0
1001 1111–1000 0000 Mute
0
ADC_DIG_
BOOST
0
0
0
0
0
153

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