Power Down And Headset Detects - Cirrus Logic CS42L42 Manual

Low-power audio codec with soundwire-i2s/tdm and audio processing
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Bits
Name
0
I2C_SCL_
I
2
C SCL debounce count enable.
DBNC_EN
Note: The settings of I2C_SDA_DBNC_EN and I2C_SCL_DBNC_EN must be identical.
0 (Default) Disabled. Must be 0 for Fast Mode or Fast-Plus Mode.
1 Enabled
7.3.12 I
2
C Stretch
R/W
7
Default
0
Bits
Name
7:0
I2C_
I
2
C stretch. Number of additional MCLKs to clock stretch after the slave is ready
STRETCH
0000 0011 (Default) 3 MCLKs
2
7.3.13 I
C Timeout
R/W
7
MAS_I2C_NACK MAS_TO_DIS
Default
1
Bits
Name
7
MAS_
APB master I
2
I2C_
master.
NACK
0 I
2
C clock stretches if an APB access is attempted while I
1 (Default) I
6
MAS_
APB master access timeout disable
TO_DIS
0 (Default) Enabled
5:4
MAS_
APB master access timeout select. Determines the timeout duration.
TO_SEL
00 64 ms
3
ACC_
APB access timeout disable.
TO_DIS
0 (Default) Enabled
2:0
ACC_
APB access timeout select. Determines the timeout duration in MCLKs.
TO_SEL
000 7 MCLKs
001 15 MCLKs

7.4 Power Down and Headset Detects

7.4.1
Power Down Control 1
R/W
7
ASP_DAO_PDN ASP_DAI_PDN
Default
1
Bits
Name
7
ASP_
ASP output path power down. Configures ASP SDOUT path power state.
DAO_
0 Powered up
PDN
1 (Default) Powered down, SDOUT is Hi-Z; ASP_DAO1 is powered down. The setting does not tristate the serial port clock.
6
ASP_
ASP DAI0 input path power down. Configures ASP DAI0 SDIN path power state.
DAI_
0 Powered up
PDN
1 (Default) Powered down. Setting this bit does not tristate the serial port clock.
5
MIXER_
Mixer power down. Configures the mixer power state.
PDN
0 The mixer is powered up.
1 (Default) The mixer is powered down.
4
EQ_
Equalizer power down. Configures the equalizer power state. See the restrictions described in
PDN
0 Powered up
1 (Default) Powered down. All filter state data is reset to pass-through coefficients.
3
HP_
HPOUTx power down
PDN
0 The HP driver and DACx are powered up.
1 (Default) The HP driver and DACx are powered down.
DS1083F2
6
5
0
0
6
5
MAS_TO_SEL
0
1
C NACK. Determines whether clock stretching or a NACK occurs if an APB access is attempted and I
2
C NACKs if APB access is attempted while I
1 Disabled
01 128 ms
1 Disabled
010 31 MCLKs
011 63 MCLKs
6
5
MIXER_PDN
1
1
Description
4
3
I2C_STRETCH
0
0
Description
4
3
ACC_TO_DIS
1
0
Description
2
C is not APB master.
2
C is not APB master.
10 256 ms
100 127 MCLKs
101 255 MCLKs
4
3
EQ_PDN
HP_PDN
1
1
Description
7.4 Power Down and Headset Detects
2
1
0
1
2
1
ACC_TO_SEL
1
1
11 (Default) 512 ms
110 511 MCLKs
111 (Default) 65,535 MCLKs
2
1
ADC_PDN
1
1
Section
4.3.
CS42L42
Address 0x100F
0
1
Address 0x1010
0
1
2
C is not APB
Address 0x1101
0
PDN_ALL
1
130

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