Keysight Technologies E4981A Programming Manual page 362

120 hz/1 khz/1 mhz capacitance meter
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Status Reporting System
Status Register Structure
Table C-3
Status Bit Definitions of the Operation Status Register
Bit
Position
10
11
12
13 to 15
*1. This is when the handler interface's /INDEX signal is active.
*2. This is when the handler interface's /EOM signal is active.
*3. This is when the trigger system is in trigger wait state. For more information on the trigger
Issuing the
The E4981A does not support events of the questionable status register. Therefore, all of
the bits in this register are always 0.
Table C-4
Status Bit Definitions of the Questionable Status Register
Bit
Position
0 to 15
360
Name
0
Not used
1
Settling
2
Ranging
3
Analog Measurement
4
Measurement
5
Waiting for Trigger
6
Not used
7
Correction
8
Data buffer 1
9
Data buffer 2
Data buffer 3
Not used
Self-test
Not used
system, refer to
"Trigger system" on page
*CLS
command will clear all bits from the operation status event register.
Name
Not used
Description
Condition Register
Always 0
Set to "1" during the waiting time
to stabilize the measurement
signal.
Set to "1" while switching the
measurement range.
Set to "1" during analog
*1
measurement
.
*2
Set to "1" during measurement
Set to "1" while the instrument is
*3
waiting for a trigger
.
Always 0
Set to "1" during correction data
measurement.
Set to "1" while data buffer 1 fills.
Set to "1" while data buffer 2 fills.
Set to "1" while data buffer 3 fills.
Always 0
Set to "1" during self-test.
Always 0
60.
Description
Condition Register
Always 0
Event Register
Always 0
Set to "1" after the waiting time
needed to stabilize the
measurement signal has elapsed.
Set to "1" when measurement
range switching is completed.
Set to "1" when analog
measurement is completed.
Set to "1" when measurement is
.
completed.
Set to "1" when the instrument
starts waiting for a trigger.
Always 0
Set to "1" when the correction data
measurement is completed.
Set to "1" when data buffer 1 is
full.
Set to "1" when data buffer 2 is
full.
Set to "1" when data buffer 3 is
full.
Always 0
Set to "1" when self-test is
completed.
Always 0
Event Register
Always 0
Appendix C

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