Filter Specification; Recommended Lc Filter Connection - Intel 810A3 Design Manual

Layout and Routing Guidelines
Figure 4-37. Recommended LC Filter Connection
The resistance from the inductor to the board 1.8V power plane represents the total resistance from
the board power plane to the filter capacitor. This resistance, which can be a physical resistor,
routing/via resistance, parasitic resistance of the inductor or combinations of these, acts as a
damping resistance for the filter and effects the response of the filter.
The LC filter topology shown in
voltage level requirement does not place constraints on the LC filter for the DPLL. The maximum
current flowing into the DPLL analog power is approximately 30 mA, much less than that of the
RAMDAC, and therefore, a filter inductor with a higher dc resistance can be tolerated. With the
topology in
maximum IR drop from the board power plane to the VCCDA ball should be 100 mV or less
(corresponds to a series resistance equal to or less than 3.3 Ω. This larger dc resistance tolerance
improves the damping and the filter response.
4.16.1

Filter Specification

The low-pass filter specification with the input being the board power plane and the output
measured across the filter capacitor is defined as follows for the filter topology shown in
Figure 4-37.
•
pass band gain < 0.2 dB
•
dc IR drop from board power plane to the DPLL VCCDA ball < 100 mV (and a maximum dc
resistance < 3.3 Ω)
•
filter should support a dc current > 30 mA
•
minimum attenuation from 100 kHz to 10 MHz = 10 dB (desired attenuation > 20 dB)
•
a magnetically shielded inductor is recommended
The resistance from the board power plane to the filter capacitor node should be designed to meet
the filter specifications outlined above. This resistance acts as a damping resistance for the filter
and affects the filter characteristics. This resistance includes the routing resistance from the board
power plane connection to the filter inductor, the filter inductor parasitic resistance, the routing
4-36
Board Power Plane
R
L
DPLL Analog Power
C
Board
G r o u n d
Plane
Figure 4-37
Figure 4-37, the filter inductor dc current rating must be at least 30 mA and the
R A M D A C A n a l o g P o w e r
V C C D A V C C D A C A 1 V C C D A C A 2
Display PLL and RAMDAC
V S S D A V S S D A C A
Board Ground Plane
is the preferred choice since the RAMDAC minimum
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810A3 Chipset Design Guide