Processor Pin Definition Comparison - Intel 810A3 Design Manual

Chipset platform
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NOTES:
1. These signals were previously defined as ground (Vss) connections in legacy designs utilizing the PGA370
socket to provide termination for unused inputs. For new Flexible PGA370 designs, use the new signal
definitions. These new signal definitions are backwards compatible with the Intel® Celeron processor
(PPGA).
2. While these signals are not used with Intel
support these functions. Only the Intel
platform.
3. The AGTL+ reset signal, RESET#, is delivered to pin X4 on Legacy PGA370 designs. On Flexible PGA370
designs it is delivered to X4 and AH4 pins. See
2.2.1

Processor Pin Definition Comparison

Table 2-2. Processor Pin Definition Comparison
Pin #
A29
A31
A33
AA33
AA35
AC1
AC37
AF4
AH20
AH4
AJ31
AK16
AK24
AL11
AL13
AL21
AM2
AN11
AN13
AN15
AN21
AN23
B36
C29
C31
C33
E23
E29
E31
®
Intel
810A3 Chipset Design Guide
®
TM
®
Intel
Celeron
Intel
Pentium
(PPGA)
128K
pin name
pin name
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GND
BSEL1
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GND
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
PGA370 Processor Design Guidelines
®
810A3 chipset designs, they are available for chipsets that do
®
®
Pentium
III processor offers these capabilities in the PGA370
Figure 2-1
for more details.
®
®
III
Intel
Pentium
256K
pin name
DEP7#
DEP3#
DEP2#
VTT
VTT
A33#
RSP#
A35#
VTT
RESET#
BSEL1
VTT
AERR#
AP0#
VTT
VTT
Reserved
VTT
AP1#
VTT
VTT
RP#
BINIT#
DEP5#
DEP1#
DEP0#
VTT
DEP6#
DEP4#
®
III
Function
Data bus ECC data
Data bus ECC data
Data bus ECC data
AGTL+ termination voltage
AGTL+ termination voltage
Additional AGTL+ address
Response parity
Additional AGTL+ address
AGTL+ termination voltage
Processor reset (Intel
processor-256K)
System bus frequency select
AGTL+ termination voltage
Address parity error
Address parity
AGTL+ termination voltage
AGTL+ termination voltage
Reserved
AGTL+ termination voltage
Address parity
AGTL+ termination voltage
AGTL+ termination voltage
Request parity
Bus initialization
Data bus ECC data
Data bus ECC data
Data bus ECC data
AGTL+ termination voltage
Data bus ECC data
Data bus ECC data
Pentium
III
2-3

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