Power Button Implementation - Intel 810A3 Design Manual

Design Checklist
8.4.1

Power Button Implementation

The items below should be considered when implementing a power management model for a
desktop system. The power states are as follows:
S1–Stop Grant – (CPU context not lost)
S3–STR (Suspend To RAM)
S4–STD (Suspend To Disk)
S5–Soft-off
•
Wake: Pressing the power button wakes the computer from S1–S5.
•
Sleep: Pressing the power button signals software/firmware in the following manner:
— If SCI is enabled, the power button will generate an SCI to the OS.
- The OS will implement the power button policy to allow orderly shutdowns.
- Do not override this with additional hardware.
— If SCI is not enabled:
- Enable the power button to generate an SMI and go directly to soft-off or a supported
- Poll the power button status bit during POST while SMIs are not loaded and go directly
- Always install an SMI handler for the power button that operates until ACPI is enabled.
— Emergency Override: Pressing the power button for 4 seconds goes directly to S5.
- This is only to be used in EMERGENCIES when system is not responding.
- This will cause the user data to be lost in most cases.
- Do not promote pressing the power button for 4 seconds as the normal mechanism to
•
To be compliant with the latest PC9x specification, machines must appear off to the user when
in the S1–S4 sleeping states. This includes:
— All lights except a power state light must be off.
— The system must be inaudible: silent or stopped fan; drives are off.
Note: Contact Microsoft* for the latest information concerning PC9x and Microsoft* Logo programs.
8-18
sleep state.
to soft-off if it gets set.
power the machine off; this violates ACPI.
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Intel 810A3 Chipset Design Guide