Ich Checklist - Intel 810A3 Design Manual

Chipset platform
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Table 8-11. ICH Checklist (Continued)
Checklist Line Items
APICD[0:1],
APICCLK
ICH RTC Oscillator
Circuitry:
GPI[8:13]
HL_COMP
5V_REF
SERIRQ
SLP_S3#, SLP_S5#
CLK66
PCI_GNT# signals
Table 8-12. ICH Checklist
Checklist Line Items
GPIO27/ALERTCLK
GPIO28/ALERTDATA
®
Intel
810A3 Chipset Design Guide
If the APIC is used: 150 Ω (approximate) pullups on APICD[0:1] and connect
APICCLK to the clock generator.
If the APIC is not used: The APICCLK can either be tied to GND or connected to the
clock generator, but not left floating.
Refer to the circuit (resistor values and capacitor values, etc.) shown in the Design
Guide.
Ensure all wake events are routed through these inputs. These are the only GPIs that
can be used as ACPI compliant wake events because they are the only GPI signals in
the resume well that have associated status bits in the GPE1_STS register.
There are 2 options for HL_COMP:
Option 1–RCOMP Method:
Tie the COMP pin to a 40 Ω 1% or 2% (or 39 Ω 1%) pullup resistor to 1.8V via a 10 mil
wide, very short (~0.5 inch) trace (targeted for a nominal trace impedance of 40 Ω).
Option 2–ZCOMP Method:
The COMP pin must be tied to a 10 mil trace that is AT LEAST 18 inches long. This
trace must be un-terminated and care should be taken when routing the signal to avoid
crosstalk (15–20 mil separation between this signal and any adjacent signals is
recommended). This signal may not cross power plane splits.
Refer to the most recent version of the Design Guide for implementation of the voltage
sequencing circuit.
Need 8.2 KΩ (approximate) pullup resistor to 3.3V.
No pullups required. These signals are always driven by the ICH.
Needs 18 pF tuning capacitor as close as possible to ICH.
No external pullups are required on PCI_GNT# signals. However, if external pullups
are implemented, they must be pulled up to 3.3V.
Add a 10 KΩ pullup resistor to 3VSB (3 volt standby) on both of these signals.
Design Checklist
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