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Design Checklist
Table 8-13. GMCH Checklist
Checklist Line Items
VCCDA
HCLK, SCLK
GTLREFA, GTLREFB
HUBREF
IWASTE
IREF
LTVCA, LTVDA
LTCLK
LOCLK/LRCLK
LMD[27:31]
Reset strapping
options:
HCOMP
Table 8-14. System Memory Checklist
Checklist Line Items
Pin 147
WP (Pin 81 on the
DIMMs)
MAA[7:4], MAB[7:4]
8-10
VCCDA needs to be connected to an isolated power plane.
22 pF cap to ground as close as possible to GMCH.
Refer to the latest design guide for the correct GTLREF generation circuit.
Refer to the latest design guide for the correct HUBREF generation circuit. Also,
place a 0.1 uF cap as close as possible to GMCH to ground.
Tie to ground.
Place a resistor as close as possible to GMCH and via straight to VSS plane.
A 174 ohm 1% resistor is recommended.
10 KΩ (approximate) pullup resistor to 3.3V if digital video out is not implemented.
Series resistor 22 ohm ± 2%.
Series resistor 33 ohm ± 2%.
Strapping options: For a "1", use a 10 KΩ (approximate) pullup resistor to 3.3V; a "0"
is default (due to internal pulldown resistors).
LMD31:
0 - Normal operation
1 - XOR TREE for testing purposes
LMD30:
0 - Normal operation
1 - Tri-state mode for testing purposes (will tri-state all signals)
LMD29:
0 - System bus frequency = 66 MHz
1 - System bus frequency = 100 MHz
LMD28:
The value on LMD28 sampled at the rising edge of CPURST#
reflects if the IOQD (In-Order Queue Depth) is set to 1 or 4.
0 - IOQD = 4
1 - IOQD = 1
LMD27:
PGA370: Connect to V
10 KΩ series resistor.
SC242: No Connect
Option 1–RCOMP Method:
Tie the HCOMP pin to a 40 ohm 1% or 2% (or 39 ohm 1%) pull-up resistor to 1.8V via
a 10 mil wide, very short (~0.5") trace.
Option 2–ZCOMP Method:
The HCOMP pin must be tied to a 10 mil trace that is AT LEAST 18" long. This trace
must be un-terminated and care should be taken when routing the signal to avoid
crosstalk (15–20 mil separation between this signal and any adjacent signals is
recommended). This signal may not cross power plane splits.
Connect to Ground (since Intel
Add a 4.7 KΩ pullup resistor to 3.3V. This is a recommendation to write-protect the
DIMM's EEPROM.
Add 10 Ω series resistors to the MAA[7:4], MAB[7:4] as close as possible to GMCH
for signal integrity.
Comments
on the processor (pin E21) through a
CORE DET
Comments
810A3 chipset does not support registered DIMMs).
®
Intel
810A3 Chipset Design Guide
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