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4.13.5
RTC External RTCRESET Circuit
The ICH RTC requires some additional external circuitry. The RTCRESET (RTC Well Test) signal
is used to reset the RTC Well. The external capacitor (2.2 uF) and the external resistor (8.2 KΩ)
between RTCRESET and the RTC battery (Vbat) were selected to create a RC time delay, such that
RTCRESET goes high some time after the battery voltage is valid. The RC time delay should be in
the range of 10–20 ms. When RTCRESET is asserted bit 2 (RTC_PWR_STS) in the
GEN_PMCON_3 (General PM Configuration 3) register is set to 1, and remains set until software
clears it. As a result, when the system boots, BIOS knows that the RTC battery has been removed.
Figure 4-28. RTCRESET External Circuit for the ICH RTC
This RTCRESET circuit is combined with the diode circuit
well to be powered by the battery when the system power is not available.
example of this circuitry that is used, in conjunction with the external diode circuit.
4.13.6
VBIAS DC Voltage and Noise Measurements
•
Steady state VBIAS will be a DC voltage of about 0.38V ±.06V.
•
VBIAS will be "kicked" when the battery is inserted to about 0.7–1.0V; it will come back to its
DC value within a few ms.
•
Noise on VBIAS must be kept to a minimum (200 mV or less).
•
VBIAS is very sensitive and can not be directly probed; it can be probed through a 0.01 uF
capacitor.
•
Excess noise on VBIAS can cause the ICH internal oscillator to misbehave or even stop
completely.
•
To minimize noise of VBIAS it is necessary to implement the routing guidelines described
above and the required external RTC circuitry as described in the Intel
®
Intel
®
Intel
810A3 Chipset Design Guide
Diode/
Battery
Circuit
1 KΩ
8.2 KΩ
+
82801AB (ICH0) I/O Controller Hub Datasheet.
Layout and Routing Guidelines
V C C 3 _ 3 S B Y
V C C R T C
1.0 µF
R T C R E S E T
2.2 µF
(Figure
4-27) which allows the RTC
Figure 4-28
is an
®
82801AA (ICH) and
4-27
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