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Table 8-4. Miscellaneous Checklist for 370-Pin Socket Processors (Continued)
CPU Pin
VTT
NO
CONNECTS
NOTES:
1. If the Intel
down with a 56 Ω resistor and RESET2# is grounded.
Table 8-5. AGTL+ Connectivity Checklist for SC242 Processors
CPU Pin
1
A[35:3]#
1
ADS#
AERR#
AP[1:0]#
BERR#
BINIT#
1
BNR#
BP[3:2]#
BPM[1:0]
1
BPRI#
BREQ[0]# (BR0#)
BREQ[1]# (BR1#)
1
D[63:0]#
1
DBSY#
DEFER#
DEP[7:0]#
1
DRDY#
1
HIT#
1
HITM#
1
LOCK#
REQ[4:0]#
RESET#
RP#
RS[2:0]#
RSP#
1
TRDY#
NOTES:
1. For SET (Single-Ended Termination) designs, no motherboard Rtt is present for AGTL+ signals.
®
Intel
810A3 Chipset Design Guide
I/O
Connect AH20, AK16, AL13, AL21, AN11, AN15, and G35 to 1.5V regulator.
Provide high and low frequency decoupling.
Decoupling Guidelines:
I
19 ea (min) 0.1uF in 0603 package placed within 200 mils of AGTL+ termination
resistor packs (r-paks). Use one capacitor for every two (r-paks).
4 ea (min) 0.47uF in 0612 package
The following pins must be left as no-connects: AA33, AA35, AK30, AM2, AN21,
N/A
E23, F10, G37, L33, N33, N35, N37, Q33, Q35, Q37, R2, S33, S37, U35, U37,
W35, X2, Y1
®
Celeron™ processor (PPGA) is not supported by the motherboard, then RTTCTRL is pulled
I/O
Connect A[31:3]# to GMCH. Leave A[35:32]# as No Connect (not supported by
I/O
chipset).
I/O
Connect to GMCH.
I/O
Leave as No Connect (not supported by chipset).
I/O
Leave as No Connect (not supported by chipset).
I/O
Leave as No Connect (not supported by chipset).
I/O
Leave as No Connect (not supported by chipset).
I/O
Connect to GMCH.
I/O
Leave as No Connect.
I/O
Leave as No Connect.
I
Connect to GMCH.
10 Ω pulldown resistor to ground.
I/O
I
Leave as No Connect (not supported by chipset).
I/O
Connect to GMCH.
I/O
Connect to GMCH.
1
I
Connect to GMCH.
I/O
Leave as No Connect (not supported by chipset).
I/O
Connect to GMCH.
I/O
Connect to GMCH.
I/O
Connect to GMCH.
I/O
Connect to GMCH.
1
I/O
Connect to GMCH.
Connect to GMCH / 240 Ω series resistor to ITP.
1
I
I/O
Leave as No Connect (not supported by chipset).
I
Connect to GMCH.
I
Leave as No Connect (not supported by chipset).
I
Connect to GMCH.
Design Checklist
Comments
Comments
8-5
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