Debug Port Changes; Tap Connector Comparison - Intel 810A3 Design Manual

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PGA370 Processor Design Guidelines
2.2.12

Debug Port Changes

Due to the lower voltage technology employed with the Intel
required to support the debug port. Previously, the test access port (TAP) signals used 2.5V logic.
This is the case with the Intel
utilizes 1.5V logic levels on the TAP. As a result, a new ITP connector is to be used on flexible
PGA370 designs. The new 1.5V connector is the mirror image of the older 2.5V connector. Either
connector will fit into the same printed circuit board layout. Just the pin numbers would change, as
can be seen in the drawing below:
Figure 2-7. TAP Connector Comparison
RESET#
RESET#
®
Caution: The Intel
Previous ITPs are designed to work with higher voltages and may damage the processor if they are
connected to an Intel
Specification EMTS) for more information regarding the debug port.
2-14
Celeron processor in the PPGA package. Intel
2.5V connector, AMP 104068-3 Vertical Plug, Top View
2
4
6
8
1
3
5
7
1.5V connector, AMP 104078-4 Vertical Receptacle, Top View
1
3
5
7
2
4
6
8
®
Pentium
III processor requires an in-target probe (ITP) with a 1.5V tolerant buffer.
®
®
III processor. See the Electrical, Mechanical and Thermal
Pentium
®
Pentium
10
12
14
16
18
20
9
11
13
15
17
19
9
11
13
15
17
19
10
12
14
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18
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Intel
®
III processor, changes are
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®
III
Pentium
22
24
26
28
30
21
23
25
27
29
21
23
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27
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22
24
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810A3 Chipset Design Guide

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