Multiple Interrupt Servicing Control - NEC V850E/IA1 mPD703116 User Manual

32-bit single-chip microcontrollers
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7.6 Multiple Interrupt Servicing Control

Multiple interrupt servicing control is a process by which an interrupt request that is currently being serviced can
be interrupted during servicing if there is an interrupt request with a higher priority level, and the higher priority
interrupt request is acknowledged and serviced first.
If there is an interrupt request with a lower priority level than the interrupt request currently being serviced, that
interrupt request is held pending.
Maskable interrupt multiple servicing control is executed when interrupts are enabled (ID = 0). Thus, if multiple
interrupts are executed, it is necessary for interrupts to be enabled (ID = 0) even during an interrupt servicing routine.
If a maskable interrupt or a software exception is generated in a maskable interrupt or software exception service
program, it is necessary to save EIPC and EIPSW.
This is accomplished by the following procedure.
(1) Acknowledgement of maskable interrupts in service program
Service program of maskable interrupt or exception
...
...
• EIPC saved to memory or register
• EIPSW saved to memory or register
• EI instruction (interrupt acknowledgement enabled)
...
...
...
...
• DI instruction (interrupt acknowledgement disabled)
• Saved value restored to EIPSW
• Saved value restored to EIPC
• RETI instruction
CHAPTER 7 INTERRUPT/EXCEPTION PROCESSING FUNCTION
User's Manual U14492EJ3V0UD
← Maskable interrupt acknowledgement
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