GE L60 Instruction Manual page 502

Line phase comparison system, ur series
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9.1 OVERVIEW
(a)
FDL
LOC
FDL
LOC
831804A1.CDR
Figure 9–23: DUAL-BREAKER LOGIC FOR PERMISSIVE AND BLOCKING TRANSMIT SCHEMES
For tripping (permissive) schemes, a positive polarity is declared for the terminal if one breaker displays positive polarity
when its FDL flag is set, while the other breaker either does not show the negative polarity or its FDL flag is dropped out.
The transmission logic for the blocking follows a different reasoning. Here, a blocking action must be established if any of
the two breakers sees a reverse direction. It must be kept in mind that the positive and negative pulses do not necessarily
complement each other, and therefore, one must not substitute not(positive polarity) = negative polarity.
F1-IA
F2-IB
F3-IC
M1-IA
M2-IB
M3-IC
87PC BKR 1 CURRENT
87PC BKR2 CURRENT
BKR1 POS
BKR 1 NEG
BKR 1 FDL
BKR2 POS
BKR2 NEG
9
BKR2 FDL
POS
NEG
FDL
TX POS
TX NEG
87PC OP
Figure 9–24: PERMISSIVE DUAL-COMPARISON SCHEME LOGIC THROUGH FAULT CONDITION
9-28
LOC
1P_RAW
FDL
1
FDL
2
2
LOC
1N_RAW
LOC
2P_RAW
FDL
2
FDL
1
1
2N_RAW
L60 Line Phase Comparison System
(b)
LOC
1P_RAW
FDL
1
FDL
2
LOC
2P_RAW
P_RAW
FDL
2
FDL
1
LOC
1P_RAW
LOC
2P_RAW
LOC
1P_RAW
LOC
2N_RAW
LOC
1N_RAW
LOC
2P_RAW
FDL
1
FDL
2
9 THEORY OF OPERATION
LOC
P_RAW
1) CB1 currents in the forward direction
on the breaker-and-a-half diameter.
2) CB2 currents in the reverse direction;
signs of shallow CT saturation (DC
component eliminated, "tail" after the
fault is cleared).
3) Composite signals of different
magnitudes but out-of-phase.
4) CB1 produces individual pulses;
FDL picks up.
5) CB2 pulses are out-of-phase;
FDL picks up.
6) Dual breaker logic effectively erases
both positive and negative pulses.
7) FDL transmits for both breaker pickups.
8) Transmitted pulses are very short (almost
perfectly erased); no 87PC operation.
831805A1.CDR
GE Multilin

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