GE L60 Instruction Manual page 478

Line phase comparison system, ur series
Hide thumbs Also See for L60:
Table of Contents

Advertisement

9.1 OVERVIEW
(I )- (I )=0
(I )- (I )=180
BUS X
I
X
t
Figures 9–4A, 9–4B, 9–4C, and 9–4D are for three-terminal lines and they correspond directly to Figures 9–2A, 9–2B, 9–
2C, and 9–2D. It will be noted from Figure 9–3 that for a three-terminal line, the relay at A must receive information from
both the remote terminals. The same applies to the relays at terminals B and C. As in the case of the two-terminal lines, the
integrator illustrated in Figure 9–4 will actually be set for 3 to 4 ms.
While all the sketches in Figures 9–2 and 9–4 compare the positive half cycle of current with a receiver output, the negative
half cycle might just as well have been selected. However, if this were done, in Figure 9–2A for example, it would have
9
been necessary to compare the presence of negative current with a received SPACE signal rather than a MARK signal.
It should be recognized that the above discussion, as well as Figures 9–1 and 9–2, are rudimentary. The complete phase
comparison scheme is considerably more sophisticated and will be discussed in more detail subsequently. However, at this
point it would be well to note that phase comparison on a continuous basis is not permitted mainly because it would tend to
reduce the security of the scheme. For this reason, fault detectors are provided. They initiate phase comparison only when
a fault occurs on, or in the general vicinity of, the protected line. A simplified sketch of the logic of a phase comparison
blocking scheme including fault detectors is illustrated in Figure 9–5. This is a somewhat more fully developed version of
Figure 9–2D, and the same logic is present at both ends of a two-terminal line.
9-4
X
Y
TRIPPING
s
s
BLOCKING
X
Y
BUS Y
I
FAULT
Y
t
GAP
t
COINCIDENCE
t
t
COINCIDENCE
t
t
COINCIDENCE
Figure 9–3: STABILITY ANGLE
L60 Line Phase Comparison System
s-STABILITY ANGLE SETTING
I
I
( X)-
( Y)=0 FOR INTERNAL FAULTS AND CURRENTS ARE IDEALLY IN PHASE
I
I
( X)-
( Y)=180 FOR EXTERNAL FAULT AND CURRENT ARE IDEALLY IN OPPOSITE DIRECTIONS
t
>
s
TRIPPING
COINCIDENCE
t
<
s
BLOCKING
COINCIDENCE
SQUARE SIGNAL Y
LEADING SQUARE SIGNAL X
SQUARE SIGNAL Y COINCIDES
SQUARE SIGNAL X
SQUARE SIGNAL Y LAGGING
SQUARE SIGNAL X
9 THEORY OF OPERATION
SIGNAL X
SIGNAL Y
TIME OF COINCIDENCE
OF SIGNALS X AND Y
831724A2.CDR
GE Multilin

Advertisement

Table of Contents
loading

Table of Contents