be made regarding pure zero sequence phase comparison with the additional limitation that it will not operate for phase-to-
phase faults. Thus, there does not appear to be one single sequence component or one single phase current that could be
used in a phase comparison scheme to protect against all types of faults.
There are a number of different approaches that are possible to provide a complete scheme. Probably, the most obvious
would be to make the phase comparison on each phase separately. This is undesirable principally because the cost would
be high since three communication channels would be required. Another approach would be to use two separate phase
comparison measurements and communication channels, one for pure positive and the other for pure negative sequence
currents. The latter would serve to protect against all unbalanced faults while the former would take care of three phase
faults and also provide a measure of back-up protection for heavy unbalanced faults. Here again cost is an important factor.
As soon as consideration is given to the use of a separate positive and a separate negative phase sequence comparison,
the idea of switching from one to the other presents itself. Such schemes are available. They include detectors separate
from the phase comparison function that distinguish between three phase faults and all other types. For three phase faults
the negative sequence network is unbalanced so that it produces an output for positive sequence current as well as for
negative sequence current. The scheme operates normally to provide negative sequence phase comparison for all unbal-
anced faults. When a three phase fault occurs, the three-phase detectors at both ends of the line operate to automatically
unbalance their respective negative sequence networks and make them sensitive to positive as well as negative sequence
currents. Since the fault is three phase, there is no negative sequence current produced so the phase comparison is made
on a pure positive sequence basis. This is all accomplished with a common communication channel for both modes.
Another similar approach would be to provide two separate sequence networks, one pure positive sequence and the other
pure negative sequence. Then use the three-phase detector to switch the logic so that only for three phase faults the out-
puts of the positive sequence networks at both ends of the line are compared but for all other faults the negative sequence
outputs are compared. Here again all this being accomplished over a common channel. This approach has never been
used possibly because of the idea of using "Mixed Excitation." Mixed Excitation is a term used to describe a phase compar-
ison scheme that mixes the outputs of the different sequence networks in a given proportion and phase angle and then
makes a phase comparison for all faults based on this mix. Thus, all such schemes must include positive sequence plus
negative sequence and/or zero sequence in order to operate for all faults. The two main questions to be resolved are:
Which sequence components should be mixed with the positive sequence?
What percentages of the full magnitude of each sequence component of current should be used?
Figure 9-7 illustrates a two-terminal line with an internal phase B-to-ground fault. The phasor diagrams indicate the phase
positions of the sequence currents at both ends of the line assuming current flow into the line and also assuming a phase A
reference as in equations (1), (2), and (3), previously shown.
At this point it should be recognized that the positive sequence component of current is made up of two parts, the load com-
ponent (I_1L) and the fault component (I_1F). By an analysis utilizing superposition, the load component (I_1L) may be
established as the current flowing just prior to the fault. The three fault components of current (I_1F, I_2F, and I_0F) are
then calculated using the voltage that existed at the point of fault just prior to the fault. Since the load component of current
is equal to the vector difference between Bus X and Bus Y voltages divided by the impedance of the line, and since the pre-
fault voltage (at the point of fault) has a phase position somewhere between that of X and Y voltages, the positive sequence
component of fault current will be displaced from the load component by about 90° ± about 30°. The phasor diagrams at the
top of Figure 9–7 assume that load current flow is from bus X to bus Y.
The first row of the table in Figure 9–7 indicates that for the conditions assumed, the net positive sequence current entering
both ends of the line are about 120° displaced from each other. Heavier fault current and lighter load current would reduce
this angle toward zero while the converse would increase the angle toward 180°.
The second and third rows of the table of Figure 9–7 indicate the relative phase positions of the positive plus negative, and
positive plus negative plus zero sequence components respectively. These appear to be more unsatisfactory. Rows 4 and
5 combine the components differently and both appear to yield much better results.
It is obvious from Figure 9–6, that a similar fault on a different phase would yield different results. This is illustrated in Figure
9–8 where a phase-A-to-ground fault at the same location is analyzed. As noted earlier, the integrator timers in phase com-
parison schemes are generally set for about 3 milliseconds. This will permit tripping on internal faults with as much as 115°
between the phase angles of the currents entering both ends of the lines. On this basis, only excitation by I_2 – (0.20) × I_1
would prove satisfactory for the two cases studied in Figures 9–7 and 9–8.
L60 Line Phase Comparison System
9 THEORY OF OPERATION