Christie CP2000-SB User Manual page 60

BUILT-IN SELF-TEST
General
System
Power-up Self Test
Security Lock Integrity
2
I C
Interface Board
Diagnostics Performed
ARM
FPGA Load
FPGA Code Valid
FPGA Initialize
FPGA No-Load Jumper
FPGA Done
FPGA Register Read/Write
UART 0
UART 1
2
I C
Ethernet
Synchronous Serial Port
File System
GPI Macro
A/D Macro
Formatter Board (a.k.a. Formatter Interface Board)
Processor Board
Diagnostics Performed
DSP
FPGA Load
FPGA Code Valid
FPGA Initialize
FPGA McBSP XRDY
FPGA Done
FPGA Register Read/Write
Serial ID Chip
CLUT SRAM
Overlay Framestore SDRAM
Resizer FIR Chip
Resizer FIFO
CP2000-SB User Manual
020-100162-06 Rev. 1 (03-2014)
NOTE: If any of the following indicators are "red", service may be needed.
Section 1: Introduction
3-15