Siemens SINUMERIK 840C Installation Instructions Manual page 614

8 PLC Machine Data (PLC MD)
8.5 PLC MD for the operating system (system bits)
PLC MD
DB63
7
DW No.
6048
DL 24
OB 7 OB 6
Default value: 1111 1100
Bit = 0 A delay in the relevant OB does not force the programmable controller to STOP.
Bit = 1 A delay in the relevant OB forces the programmable controller to STOP.
Note:
If you do not want the programmable controller to go to STOP when there is a processing
delay in an OB, you must make use of a bit in flag byte 6 which is set when such a delay
occurs. The user program can scan this bit and take any appropriate measures.
PLC MD
DB63
7
DW No.
6049
DR 24
Default value: 0
Bit 0 For installation and for testing the STEP 5 program.
Bit = 0 No precise cause for a time-out during bus access can be displayed. In standard
operations, this bit must be 0.
Bit = 1 The exact cause of a time-out (QVZ) is displayed as one item of precision error
detection data (135 WB PLC). Bus access or the STEP 5 program is slower.
The bus interface executes a write access to the link or local bus while the processor receives
an acknowledgement and continues operation (buffered access to local/link bus). Should a
timeout occur during this type of write access, no deductions can be made regarding its cause
by inspecting the state of to the processor and coprocessor registers.
The user can switch off buffered access to link and local bus via machine data (PLC operating
system MD bits 6049.0 (e.g. if he wishes to test STEP 5 programs during start-up). However,
this type of access operates is slower as the processor only receives an acknowledgement
once the entire bus cycle is completed.
You must set machine data 6048.0 to be able to determine the exact cause of the timeout.
Bit 1 = 0 No IP/WF modules used (standard)
Bit 1 = 1 IP/WF modules inserted, a cold restart is enforced after every RESET.
8–22
Bit No.
6 5 4
Stop during processing delay by
OB 5 OB 4
Bit No.
6 5 4
© Siemens AG 1992 All Rights Reserved
3 2 1
OB 3 OB 2
3 2 1
OB1 without
Cold restart
minimum
on RESET
cycle time
6FC5197- AA50
SINUMERIK 840C (IA)
09.95
0
0
Access to
link bus