Avaya Nortel Communication Server 1000 Reference page 592

NTDW12AAE5 Universal Clock Controller daughter board
Reference Clock Selection
The DTI/PRI card routes its reference to the appropriate line on the backplane. The clock
controller distributes the primary and secondary references and ensures that no contention is
present on the REFCLK1 backplane line. It designates the DTI/PRI motherboard as a primary
reference source. The secondary reference is obtained from another DTI/PRI card, which is
designated by a technician. No other clock sources are used.
External timing interface
The clock controller provides an external timing interface and accepts two signals as timing
references. An external reference is an auxiliary timing clock which is bridged from a traffic
carrying signal and is not intended to be a dedicated non-traffic-bearing timing signal. The clock
controller uses either the external/auxiliary references or the DTI/PRI references.
Hardware integrity and regulatory environment
The clock controller complies with the following hardware integrity and regulatory
specifications:
Item
EMI
ESD
Temperature
Humidity
Vibration/Shock
592 Circuit Card Reference
Specification
FCC part 15 sub- part J
CSA C108.8
CISPR publication 22
IEC 801-2
IEC 68-2-1
IEC 68-2-2
IEC 68-2-14
IEC 68-2-3
IEC 68-2-6
IEC 68-2-7
IEC 68-2-29
IEC 68-2-31
IEC 68-2-32
Comments? infodev@avaya.com
July 2011