Avaya Nortel Communication Server 1000 Reference page 38

Overview
synchronous serial data buses. One bus transports in the Transmit (Tx) direction towards the
line facility and the other in the Receive (Rx) direction towards the CS 1000E, CS 1000M, and
Meridian 1.
Each bus has 32 channels for Pulse Code Modulated (PCM) voice data. Each channel consists
of a 10-bit word. See
for PCM data, one bit is the call signaling bit, and the last bit is a data valid bit. The eight-bit
PCM portion of a channel is called a timeslot. The DS-30X loop is clocked at 2.56 Mbps (one-
half the 5.12 MHz clock frequency supplied by the controller card). The timeslot repetition rate
for a single channel is 8 kHz. The controller card also supplies a locally generated 1 kHz frame
sync signal for channel synchronization.
Signaling data is transmitted to and from the line cards using the call signaling bit within the
10-bit channel. When the line card detects a condition that the switch needs to know about, it
creates a 24-bit signaling word. This word is shifted out on the signaling bit for the associated
channel one bit at a time during 24 successive DS-30X frames. Conversely, when the switch
sends signaling data to the line card, it is sent as a 24-bit word divided among 24 successive
DS-30X frames.
Figure 3: DS-30X loop data format
DS-30Y network loops extend between controller cards and superloop network cards in the
Common Equipment (CE). They function in a manner similar to DS-30X loops. See
Digital line interface unit block diagram
A DS-30Y loop carries the PCM timeslot traffic of a DS-30X loop. Four DS-30Y network loops
form a superloop with a capacity of 128 channels (120 usable timeslots). See Communication
Server 1000M and Meridian 1 Large System Planning and Engineering (NN43021-220) for
more information about superloops.
Card LAN link
Maintenance communication is the exchange of control and status data between IPE line or
trunk cards and the Call Server by way of the NT8D01 Controller card. Maintenance data is
transported through the card LAN link. This link is composed of two asynchronous serial buses
(called the Async card LAN link in
38 Circuit Card Reference
Figure 3: DS-30X loop data format
on page 42.
Figure 2: Typical IPE analog line card architecture
Comments? infodev@avaya.com
on page 38. Eight of the 10 bits are
Figure 5:
on
July 2011