Page 1 Circuit Card Reference Nortel Communication Server 1000 NN43001-311, 04.04 July 2011...
Page 2 Product provided by Avaya including the selection, arrangement and While reasonable efforts have been made to ensure that the design of the content is owned either by Avaya or its licensors and is information in this document is complete and accurate at the time of protected by copyright and other intellectual property laws including the printing, Avaya assumes no liability for any errors.
Page 3: Table Of Contents
Contents Chapter 1: New in this release................... Features..............................21 Common Processor Media Gateway (CP MG) card................ 21 Common Processor Dual Core (CP DC) card.................. 21 128-port DSP daughterboard......................22 Other................................. 22 Revision History..........................22 Chapter 2: How to get help....................Getting help from the Nortel web site......................
Page 4 NT8D15 E and M Trunk card......................58 NTCK16 Generic Central Office Trunk card..................58 Installation............................59 Operation............................60 Host interface bus..........................60 Trunk interface unit........................... 65 Serial Data Interface (SDI) cards......................66 Uses..............................67 Features............................67 Specifications........................... 68 Installation............................69 Maintenance.............................
Page 5 NT8D41BA Quad Serial Data Interface Paddle Board................107 Baud rate............................107 Address............................108 DTE/DCE mode..........................109 QPC43 Peripheral Signaling card......................109 QPC414 Network card..........................110 QPC441 3-Port Extender cards........................ 110 QPC841 4-Port Serial Data Interface card....................113 Chapter 8: NT1R20 Off-Premise Station Analog Line card..........Contents..............................
Page 6 Memory............................144 Front panel connector pin assignments....................145 COM1 and COM2 ports........................145 USB port............................145 10/100/1000 Mbps Ethernet ports....................146 Front panel LED indicators....................... 146 ITP connector (25 PIN, Debug Only)....................147 Post 80 Debug LEDs (Optional)....................... 147 Chapter 10: NT5D11 and NT5D14 Lineside T1 Interface cards........Contents..............................
Page 7 Functional description..........................199 Overview............................199 Card interfaces..........................200 E1 interface circuit..........................200 Signaling and control........................200 Card control functions........................201 Microcontrollers..........................201 Card LAN interface........................... 201 Sanity Timer............................. 202 Man-Machine Interface........................202 ELEI additional functionality......................202 Electrical specifications..........................203 E1 channel specifications......................... 203 Power requirements.........................
Page 8 Performance counters and reporting....................237 Testing.............................. 239 Applications............................... 242 Chapter 12: NT5D60/80/81 CLASS Modem card (XCMC)..........Contents..............................245 Introduction............................... 245 Physical description..........................246 Functional description..........................246 Electrical specifications..........................249 Data transmission specifications...................... 249 Power requirements......................... 250 Environmental specifications......................250 Configuration............................. 251 Software service changes........................
Page 9 MFC signaling............................295 Signaling levels..........................296 Forward and backward signals......................296 MFE signaling............................297 Sender and receiver mode........................298 Receive mode..........................298 Send mode............................298 XMFC sender and receiver specifications..................298 XMFE sender and receiver specifications..................299 Physical specifications..........................300 Chapter 16: NT6D70 SILC Line card..................
Page 10 Environmental and power requirements................... 328 Installation..............................329 Device number..........................329 MSDL interfaces..........................329 Installing the MSDL card........................330 Cable requirements.......................... 331 Cable installation..........................333 MSDL planning form......................... 334 Maintenance.............................. 335 MSDL states............................. 335 Maintaining the MSDL........................337 System controlled maintenance....................... 338 Manually controlled maintenance.....................
Page 11 Foreign and surge voltage protections..................... 372 Overload level..........................373 Environmental specifications......................373 Connector pin assignments........................373 Configuration............................. 375 Jumper and switch settings......................375 Software service changes........................ 376 Chapter 21: NT8D14 Universal Trunk card............... Contents..............................379 Introduction............................... 379 Physical description..........................381 Functional description..........................
Page 12 Maintenance features........................441 Operation..............................441 Signaling and call control......................... 441 Electrical specifications..........................450 Power requirements......................... 451 Environmental specifications......................452 Foreign and surge voltage protection....................452 Connector pin assignments........................452 Configuration............................. 455 Jumper settings..........................455 Software service entries........................457 Applications............................... 459 PAD switching...........................
Page 13 Chapter 26: NTAK09 1.5 Mb DTI/PRI card................. Contents..............................491 Introduction............................... 491 Physical description..........................492 NTAK09 DTI/PRI power on self-test....................493 NTAK20 power on self-test....................... 493 NTAK93 self-test..........................494 DTI/PRI local self-test........................494 Power requirements......................... 494 Foreign and surge voltage protection....................494 Functional description..........................
Page 14 Signal conditioning........................... 519 Sanity timer............................519 Microprocessor..........................519 External timing interface........................520 Hardware integrity and regulatory environment................520 Chapter 29: NTAK79 2.0 Mb PRI card................Contents..............................521 Introduction............................... 521 Physical description..........................522 NTAK79 switches..........................523 Power requirements......................... 525 Environment............................. 525 Functional description..........................
Page 15 Software interface circuit........................546 DPNSS/DCHI Port..........................546 D-Port - SDTI/PRI interface......................546 Chapter 32: NTBK22 MISP card..................Contents..............................547 Introduction............................... 547 Physical description..........................547 Functional description..........................548 Micro Processing Unit (MPU)......................548 High-Level Data Link Controller (HDLC)..................548 CPU to MISP bus interface......................549 MISP network bus interface......................
Page 16 Background audit..........................565 Chapter 35: NTCK16 Generic Central Office Trunk cards..........Contents..............................567 Introduction............................... 567 Physical description..........................568 Switch settings..........................568 Self-test............................569 Functional description..........................569 Common features..........................569 Operation..............................570 Loop start operation......................... 570 Electrical specifications..........................571 Power requirements......................... 571 Environmental specifications......................
Page 17 External connections........................596 Internal connections......................... 596 Expansion daughterboards........................596 Backplane interface........................... 597 Serial data interface ports......................... 597 TTY default settings......................... 597 MGC serial port configuration change....................597 Faceplate LED display..........................598 Faceplate LED display........................598 Chapter 38: NTDW20 Media Gateway Extended Peripheral Equipment Controller card Contents..............................
Page 18 Media storage............................626 Fixed media drive..........................626 Removable media drive........................626 Hard disk drive..........................627 Memory..............................630 Memory upgrade..........................630 Ethernet interfaces............................ 635 ELAN..............................635 HSP..............................636 TLAN..............................636 Serial data interface ports......................... 636 TTY parameters..........................636 USB 2.0 port.............................. 637 Security device............................
Page 19 NTRB21 TMDI card.......................... 656 Architecture............................... 656 Signaling interface..........................656 Interconnection..........................656 Microprocessor..........................657 Digital pad............................657 D-channel interface.......................... 658 DS-1 Carrier interface........................659 NTAK20 Clock Controller (CC) daughterboard................. 660 Chapter 45: NTVQ01xx Media Card................... Contents..............................663 Physical description..........................663 Hardware architecture..........................664 Faceplate connectors and indicators....................
Page 20 Circuit Card Reference July 2011...
Page 21: Chapter 1: New In This Release
Chapter 1: New in this release This technical document provides information about circuit cards supported for the Communication Server 1000 Release 7.0. Features The following sections describe new circuit cards introduced in CS 1000 Release 7.0. Common Processor Media Gateway (CP MG) card The Common Processor Media Gateway (CP MG) card is introduced.
Page 22: 128-Port Dsp Daughterboard
June 2010 Standard 04.01. Up-issued to reflect changes in technical content. October 2009 Standard 03.07. Up-issued to reflect changes in technical content. September 2009 Standard 03.06. Up-issued to reflect changes in technical content. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 23 Other September 2009 Standard 03.05. Up-issued to reflect updates to content. September 2009 Standard 03.04. Up-issued to reflect changes in technical content. July 2009 Standard 03.03. This document is up-issued to correct the heading of table NT8D17 Conference/TDS card. May 2009 Standard 03.02.
Page 24 • Option 11C and 11C mini Technical Reference Guide (553-3011-100) (Content from Option 11C and 11C mini Technical Reference Guide (553-3011-100) also appears in Telephones and Consoles Fundamentals (NN43001-567) • Circuit Card Reference (553-3023-211) Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 25: Chapter 2: How To Get Help
Chapter 2: How to get help This chapter explains how to get help for Nortel products and services. Getting help from the Nortel web site The best way to get technical support for Nortel products is from the Nortel Technical Support web site: http://www.nortel.com/support This site provides quick access to software, documentation, bulletins, and tools to address...
Page 26: Getting Help From A Specialist By Using An Express Routing Code
Getting help through a Nortel distributor or reseller If you purchased a service contract for your Nortel product from a distributor or authorized reseller, contact the technical support staff for that distributor or reseller. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 27: Chapter 3: Introduction
Note on legacy products and releases This NTP contains information about systems, components, and features that are compatible with Nortel Communication Server 1000 Release 7.0 (or later) software. For more information about legacy products and releases, click the Technical Documentation link under Support &...
Page 28: Intended Audience
Unless specifically stated otherwise, the term Element Manager refers to the Communication Server 1000 Element Manager. In this document, the Media Gateway 1000E (MG 1000E) and Media Gateway 1010 (MG 1010) are referred to generically as Media Gateway. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 29: Related Information
• Hospitality Features Fundamentals, NN43001-553 Online To access Nortel documentation online, click the Technical Documentation link under Support & Training on the Nortel home page: http://www.avaya.com CD-ROM To obtain Nortel documentation on CD-ROM, contact your Nortel customer representative. Circuit Card Reference...
Page 30 Introduction Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 31: Chapter 4: Overview
Chapter 4: Overview Contents This section contains information on the following topics: Line cards on page 32 Installation on page 33 Operation on page 34 Analog line interface units on page 39 Digital line interface units on page 41 Analog line call operation on page 43 Digital line call operation on page 46...
Page 32: Line Cards
This card is normally used whenever the phone lines leave the building in which the switch is installed. The OPS line card supports message waiting notification by interrupting the dial tone when the receiver is first picked up. It also provides battery reversal Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 33: Nt5D11 And Nt5D14 Lineside T1 Interface Card
Line cards answer and disconnect analog line supervision and hook flash disconnect analog line supervision features. NT5D11 and NT5D14 Lineside T1 interface card The NT5D11/14 Lineside T1 Interface card is an intelligent 24-channel digital line card that is used to connect the switch to T1-compatible terminal equipment on the lineside. The T1- compatible terminal equipment includes voice mail systems, channel banks containing FXS cards, and key systems such as the Nortel Norstar.
Page 34 This section describes how line cards fit into the CS 1000E, CS 1000M, and Meridian 1 architecture, the busses that carry signals to and from the line cards, and how they connect to Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 35: Intelligent Peripheral Equipment
Line cards terminal equipment. These differences are summarized in Table 3: IPE module architecture page 35. Host interface bus Cards based on the IPE bus use a built-in microcontroller. The IPE microcontroller is used to do the following: • perform local diagnostics (self-test) •...
Page 36 • reporting of firmware version • downloading line interface unit parameters • reporting of line interface unit configuration • enabling/disabling of the DS-30X network loop bus • reporting of card status or T1 link status Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 37 Line cards Figure 2: Typical IPE analog line card architecture DS-30X loops The line interfaces provided by the line cards connect to conventional 2-wire (tip and ring) line facilities. IPE analog line cards convert the incoming analog voice and signaling information to digital form and route it to the Call Server over DS-30X network loops.
Page 38 Call Server by way of the NT8D01 Controller card. Maintenance data is transported through the card LAN link. This link is composed of two asynchronous serial buses (called the Async card LAN link in Figure 2: Typical IPE analog line card architecture Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 39: Analog Line Interface Units
Line cards page 37). The output bus is used by the system controller for output of control data to the line card. The input bus is used by the system controller for input of line card status data. A card LAN link bus is common to all of the line/trunk card slots within an IPE module. This bus is arranged in a master/slave configuration where the controller card is the master and all other cards are slaves.
Page 40 On some of the line cards, the gain of these filters can be programmed by the system controller. This allows the system to make up for line losses according to the loss plan. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 41: Digital Line Interface Units
Line cards Balancing network Depending on the card type, the balancing network provides a 600 ¾, 900 ¾, 3COM or 3CM2 impedance matching network. It also converts the 2-wire transmission path (tip and ring) to a 4-wire transmission path (Rx/ground and Tx/ground). The balancing network is usually a transformer/analog (hybrid) circuit combination, but can also be a monolithic Subscriber Line Interface Circuit (SLIC) on the newer line cards.
Page 42 The digital line interface units also contain signaling and control circuits that establish, monitor, and take down call connections. These circuits work with the system controller to operate the digital line interface circuits during calls. The circuits receive outgoing call signaling messages Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 43: Analog Line Call Operation
Line cards from the controller and return incoming call status information to the controller over the DS-30X network loop. Analog line call operation The applications, features, and signalling arrangements for each line interface unit are configured in software and implemented on the card through software download messages. When an analog line interface unit is idle, it provides a voltage near ground on the tip lead and a voltage near –48 V dc on the ring lead to the near-end station.
Page 44 Overview Figure 6: Call connection sequence - near-end station receiving call Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 45: Message Waiting
Line cards Figure 7: Call connection sequence - near-end originating call Message waiting Line cards that are equipped with the message waiting feature receive notification that a message is waiting across the Card LAN link (IPE cards). On cards that drive a message waiting light, the light is turned on by connecting the ring side of the telephone line to the –150 V dc power supply.
Page 46: Digital Line Call Operation
Digital line call operation is controlled entirely by use of messages between the digital telephone and the system. These messages are carried across the TCM loop interface. There is no call connection sequence similar to the one used for analog telephone line operation. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 47: Lineside T1 And E1 Call Operation
Line cards Lineside T1 and E1 call operation The lineside T1/E1 card's call operation is performed differently depending on whether the T1/ E1 link is configured to process calls in loop start mode or ground start mode. Configuration is performed through dip switch settings on the lineside T1/E1 card. The lineside T1/E1 card performs calls processing separately on each of its 24 channels.
Page 48 Overview Figure 8: Battery reversal answer and disconnect supervision sequence Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 49 Line cards Figure 9: Hook flash disconnect supervision sequence Call operation is described by categorizing the operation into the following main states: • Idle (on-hook) • Incoming calls • Outgoing calls • Calls disconnected by the CO • Calls disconnected by the telephone Circuit Card Reference July 2011...
Page 50 For the Lineside T1 card to support distant end disconnect in loop start mode, the following configuration parameters must exist: • The Supervised Analog Line (SAL) feature must be configured for each Lineside T1 port. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 51 Line cards Note: By default, the SAL feature opens the tip side for 750 m/s in loop start operation. This is configurable in 10 m/s increments. • For outgoing trunk calls, the trunk facility must provide far end disconnect supervision. •...
Page 52 T1's receive B bit to change from 1 to 0. In turn, the Lineside T1 card simulates grounding its tip lead by changing the transmit A bit to 0. The terminal equipment responds to this message by removing the ring ground (lineside T1's receive B bit is changed Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 53 Line cards to 1) and simulating open loop at the terminal equipment (lineside T1's receive A bit is changed to 0). Call disconnect from far end PSTN, private network or local station While a call is in process, the far end might disconnect the call. If the Lineside T1 port is configured with the Supervised Analog Line (SAL) feature, the Lineside T1 responds to the distant end disconnect message by opening tip ground.
Page 54 CPE until it detects an open loop indication (A=0) from the CPE, at which time it provides an open tip indication (A=1). Therefore, without SAL software, the Lineside T1 card is not capable of initiating the termination of a call to the CPE. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 55: Voice Frequency Audio Level
Line cards With the SAL software configured for each Lineside T1 line, the Lineside T1 card provides an open tip indication to the CPE when it receives an indication of supervised analog line from the system. This provides normal ground start protocol call termination. Glare restrictions In telephone lines or trunks, glare occurs when a call origination attempt results in the answering of a terminating call that is being presented by the far end simultaneously with the...
Page 56: Line Protectors
Commissioning, NN43021-310. This requirement includes connecting the ground for the protection devices to the approved building earth ground reference. Any variances to these grounding requirements could limit the functionality of the protection device. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 57: Line And Telephone Components
Trunk cards Line and telephone components Because testing of the line protectors was limited to the line cards and telephones shown below, only these components should be used for off-premise installations. Telephones • Meridian Modular Telephones (digital) • Meridian Digital Telephones •...
Page 58: Nt8D14 Universal Trunk Card
The NTCK16 generic central office trunk cards support up to eight analog central office trunks. They can be installed in any IPE slot that supports IPE. The cards are available with or without Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 59: Installation
Trunk cards the Periodic Pulse Metering (PPM) feature. The cards are also available in numerous countries. Installation This section provides a high-level description of how to install and test trunk cards. IPE trunk cards can be installed in any IPE slot of the NT8D37 IPE module. Figure 10: IPE trunk cards installed in an NT8D37 IPE module on page 59 shows where an IPE trunk card...
Page 60: Operation
IPE trunk cards all share a similar architecture. Figure 11: Typical IPE trunk card architecture on page 61 shows a typical IPE trunk card architecture. The various trunk cards differ only in the number and types of trunk interface units. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 61 Trunk cards Figure 11: Typical IPE trunk card architecture The switch communicates with IPE modules over two separate interfaces. Voice and signaling data are sent and received over DS-30X loops and maintenance data is sent over a separate asynchronous communication link called the card LAN link. Signaling data is information directly related to the operation of the telephone line or trunk.
Page 62 24 successive DS-30X frames. Conversely, when the switch sends signaling data to the line card, it is sent as a 24-bit word divided among 24 successive DS-30X frames. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 63 Trunk cards Figure 12: DS-30X loop data format DS-30Y network loops extend between controller cards and superloop network cards in the common equipment, and function in a manner similar to DS-30X loops. See Figure 13: Network connections to IPE modules on page 64.
Page 64 In this reply, the slave informs the controller if any change in card status is taken place. The controller can then prompt the slave for specific information. Slaves only respond when prompted by the controller; they do not initiate exchange of control or status data on their own. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 65: Trunk Interface Unit
Trunk cards When an IPE line or trunk card is first plugged into the backplane, it runs a self-test. When the self test is completed, a properly functioning card responds to the next controller card poll with the self-test status. The controller then queries for card identification and other status information.
Page 66: Serial Data Interface (Sdi) Cards
19.2 kbps (up to 64 kbps) and/or when the cable length is greater than 15.24 m (50 ft). Table 9: Serial data interface cards on page 67 shows compatibility between the three SDI cards and the various switch options. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 67: Uses
Serial Data Interface (SDI) cards Table 9: Serial data interface cards Compatible System Options Card Ports Port types 51C, 61C NT8D41BA RS-232-C asynchronous QPC841 RS-232-C asynchronous The NT8D41BA QSDI paddle board does not use a front panel. It mounts to the rear of the backplane in the NT5D21 Core/Network module, and does not consume a module slot.
Page 68: Specifications
15 000m; (50 000 ft) Electrostatic discharge The SDI cards meet the requirements of the IEC 801-2, clause 8.0 procedure. They can withstand a direct discharge of ±5 to ±20 kV without being damaged. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 69: Installation
Serial Data Interface (SDI) cards Electromagnetic interference The CS 1000E, CS 1000M, and Meridian 1 systems meet the requirements of FCC Part 15 and CSA C108.8 electromagnetic interference (EMI) standards as a class "A" computing device. To accomplish this, the SDI cables must exit the module through EMI filters on the I/O panel.
Page 70 LD 48 Link Diagnostic – For checking Automatic Call Distribution (ACD) and Meridian Link ports. Instructions for running the various maintenance programs are found in Software Input/Output Reference — Administration (NN43001-611). System messages are interpreted in Software Input/Output Reference — System Messages (NN43001-712). Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 71: Chapter 5: Circuit Card Installation
Chapter 5: Circuit card installation Contents This section contains information on the following topics: Card slots - Large System on page 71 Circuit and installation on page 71 Precautions on page 74 Installing a circuit card on page 76 Card slots - Large System The following table in this chapter identifies card slot compatibility in the following modules: •...
Page 72 Core/Net: 0-7 Net: 5-12 NT5K36 Direct Inward/Direct Outward Dial IPE: any slot but "Contr" Trunk card NT5K70 Central Office Trunk card IPE: any slot but "Contr" NT5K71 Central Office Trunk card IPE: any slot but "Contr" Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 73 Circuit and installation Component Large System NT5K72 E and M Trunk card IPE: any slot but "Contr" NT5K82 Central Office Trunk card IPE: any slot but "Contr" NT5K83 E and M Trunk card IPE: any slot but "Contr" NT5K84 Direct Inward Dial Trunk card IPE: any slot but "Contr"...
Page 74: Precautions
QPC789 16-Port 500/2500 Message Waiting IPE: any slot but "Contr" Line card QPC841 4-Port Serial Data Interface card Core/Net: 0-7 Precautions To avoid personal injury and equipment damage, review the following guidelines before handling system equipment. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 75 Precautions Warning: Module covers are not hinged; do not let go of the covers. Lift covers away from the module and set them out of your work area. Warning: Circuit cards may contain a lithium battery. There is a danger of explosion if the battery is incorrectly replaced.
Page 76: Installing A Circuit Card
• Return defective or heavily contaminated cards to a repair center. Do not try to repair or clean them. Installing a circuit card This procedure provides detailed installation instructions for circuit cards. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 77 Installing a circuit card Danger: To avoid personal injury and equipment damage, read all of the guidelines in Circuit and installation on page 71 before you begin installation and follow all guidelines throughout the procedure. Installing a circuit card 1. Open the protective carton and remove the circuit card from the antistatic bag. Return the antistatic bag to the carton and store it for future use.
Page 78 11. If you are installing the card in a working system, refer to the work order and the technical document, Software Input/Output Reference — Administration (NN43001-611) to add the required office data to the system memory. 12. Go to the appropriate test procedure in Acceptance tests on page 79. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 79: Chapter 6: Acceptance Tests
Chapter 6: Acceptance tests Contents This section contains information on the following topics: Introduction on page 79 Conference cards on page 79 Digitone receiver cards on page 81 Line cards on page 82 Multifrequency sender cards on page 82 Multifrequency signaling cards on page 83 Network cards on page 83...
Page 80 After you enter the CNFC command, any two telephones (one may already be the maintenance telephone) dialing the special service prefix code (SPRE) and the Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 81: Digitone Receiver Cards
Digitone receiver cards digits 93 enter the manual conference call. The prime directory number (PDN) indicator, if equipped, lights on each telephone. Going on-hook takes the telephone out of the manual conference call, and the test must be restarted. See LD 38 in Software Input/Output Reference — Administration (NN43001-611) for more detailed information about using this command.
Page 82: Line Cards
ENLX. (This command is used in LD 34 and LD 46 to address even loops and in LD 38 to address odd loops.) Enabling the loops with the command ENLL does not enable the hardware for the card. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 83: Multifrequency Signaling Cards
Multifrequency signaling cards If the system response is other than OK, see Software Input/Output Reference — Administration (NN43001-611) to analyze the messages. 3. Access the system from a maintenance telephone; then enter: LD 46 Give the system approximately 20 seconds to load the program. See "Communicating with the Meridian 1"...
Page 84: Trunk Cards
(loop, shelf, and card numbers) If the system response is other than OK, see Software Input/Output Reference — Administration (NN43001-611) to analyze the messages. 6. End the session in LD 41: **** Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 85: Tone And Digit Switch Cards
Tone and digit switch cards Tone and digit switch cards Testing tone and digit switch cards Use this procedure to test a tone and digit switch (TDS) card or to test the TDS function of an NT8D17 Conference/TDS card. 1. Log into the system: LOGI (password) 2.
Page 86 342#loop## Provides dial tone from TDS loop specified. OVF#loop## 683#loop## Provides overflow tone from TDS loop specified. RBK#loop## 725#loop## Provides ringback tone from TDS loop specified. RNG#loop## 764#loop## Provides ring tone from TDS loop specified. **** Exits TDS test program. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 87: Chapter 7: Option Settings
Chapter 7: Option settings Contents This section contains information on the following topics: Circuit card grid on page 87 NT1R20 Off-Premise Station card on page 89 Table 15: General purpose switch settings on page 91 NT6D42 Ringing Generator DC on page 95 NT6D80 Multi-purpose Serial Data Link card on page 97 NT8D14 Universal Trunk card...
Page 88 Throughout this document, if neither ON nor OFF is given (there is a blank space) for a position on a switch, that position may be set to either ON or OFF because it has no function for the option described. Figure 17: Circuit card grid Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 89: Nt1R20 Off-Premise Station Card
NT1R20 Off-Premise Station card NT1R20 Off-Premise Station card Table 14: OPS analog line card configuration on page 89 lists option settings for the NT1R20 Off-Premise Station analog card. Table 14: OPS analog line card configuration Application On-premise station (ONS) Off-premise station (OPS) Class of Service (CLS) (Note 1)
Page 90: Nt5D12 Dual Dti/Pri (Ddp) Card
Store unused straps on the OPS analog line card by installing them on a single jumper pin as shown below: NT5D12 Dual DTI/PRI (DDP) card Switch setting tables for this card are listed in subsections according to their function. Bold font designates factory (default) settings. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 91: General Purpose Switches
NT5D12 Dual DTI/PRI (DDP) card General purpose switches Use switch set SW9 for Trunk 0; use switch set SW15 for Trunk 1 (see Table 15: General purpose switch settings on page 91). Table 15: General purpose switch settings Switch Description SW9/SW15 switch setting Framing Mode off - ESF...
Page 92: Ring Ground Switches
Table 20: DCH mode and address select switch settings Switch Description S3 Switch Setting D-Channel daughterboard Address See the next table. For future use External DCH or Onboard DDCH off - MSDL or DCHI card Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 93: Illustrations Of Switch Locations And Settings
NT5D12 Dual DTI/PRI (DDP) card Switch Description S3 Switch Setting on - Onboard DDCH daughterboard Table 21: NTBK51AA/NTBK51CA daughterboard address select switch settings Device Switch Setting Address Note: 1. The maximum number of DCHI, MSDL, and DDCH devices in the system is 16. The Device Addresses are equivalent to the MSDL DNUM designations.
Page 94 Option settings Figure 18: Switch functions and areas Figure 19: Switch default settings on page 95 displays default settings for switches on the NT5D12 DDP card. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 95: Nt6D42 Ringing Generator Dc
NT6D42 Ringing Generator DC Figure 19: Switch default settings NT6D42 Ringing Generator DC Table 22: NT6D42 recommended options for North American and British Telecom on page 95 through Table 27: NT6D42CC SW2 on page 97 list option settings for the NT6D42 Ringing Generator.
Page 96 –120 V dc 80 V ac –150 V dc 75 V ac –120 V dc 75 V ac –150 V dc 70 V ac –120 V dc 70 V ac –150 V dc Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 97: Nt6D80 Multi-Purpose Serial Data Link Card
NT6D80 Multi-purpose Serial Data Link card Table 27: NT6D42CC SW2 Ringing voltage Message waiting voltage 86 V ac –100 V dc 86 V ac –150 V dc 80 V ac –100 V dc 80 V ac –150 V dc 75 V ac –100 V dc 75 V ac –150 V dc...
Page 98: Nt8D14 Universal Trunk Card
Table 30: NT8D14 vintages BA/BB jumper strap settings-factory standard Trunk types Loop length Jumper strap settings J1.X J2.X J3.X J4.X CO/FX/WATS Zero–1524 m (5000 ft) 1–2 1–2 2-way tie (LDR) 2-way tie (OAID) Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 99 NT8D14 Universal Trunk card Trunk types Loop length Jumper strap settings J1.X J2.X J3.X J4.X Zero–600 ohms RAN: continuous Not applicable: RAN and operation mode paging trunks should not leave the building. Paging Note: Jumper strap settings J1.X, J2.X, J3.X, and J4.X apply to all eight units; "X" indicates the unit number, 0–7.
Page 100 22 AWG 24 AWG 26 AWG 22 AWG 24 AWG 26 AWG 915 m (3000 ft) 1524 m (5000 ft) 162 2225 m (7300 ft) 236 3566 m (11700 5639 m (18500 1544 Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 101: Nt8D15 E And M Trunk Card
NT8D15 E and M Trunk card NT8D15 E and M Trunk card Table 34: NT8D15 E and M Trunk card Jumper Mode of operation (Note 2) (Note 1) 2-wire trunk 4-wire trunk Type I Paging Type I Type II DX tip & ring pair M—rcv M E—rcv M—...
Page 102: Nt8D17 Conference/Tds Card
Set SW2 position 4 to ON to disable the warning tone option. When the warning tone is enabled, select the warning tone level as shown below: • 24 dB Connect pins 1 and 2 • 30 dB Connect pins 2 and 3 Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 103: Nt8D21 Ringing Generator Ac
NT8D21 Ringing Generator AC NT8D21 Ringing Generator AC Frequency Amplitude Settings 20 Hz 86 V ac open open 2–5 8–11 25 Hz 70 V ac open 1–4 7–10 open 25 Hz 80 V ac open 3–6 9–12 open 25 Hz 86 V ac open 2–5 8–11...
Page 104 For each slave, indicates the Configure 3–8 according to the Table 41: slave address NT8D22AD/NT8D22ADE5 slave address-SW2 on slave on page 106. Table 39: NT8D22 SW3 SW3 indication Position master slave on off master slave Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 105 NT8D22 System Monitor SW3 indication Position FAIL master slave MAJOR master slave Table 40: NT8D22 settings for total number of slaves-SW2 on master How many Switch position How many Switch position slave units slave units on on on on on on off on on on on on on on on on on off off on on on on off...
Page 106 Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 107: Nt8D22 Jumper Settings
NT8D41BA Quad Serial Data Interface Paddle Board Slave unit Position Slave unit Position address address on off on on off off off off on on off off on off on off on on off off on off on on on off on off on off off off on off on off on off on off off on off off on off off on...
Page 108: Address
* To enable ports 1 and 2, set SW15 position 1 to ON. To enable ports 3 and 4, set SW16 position 1 to ON. For each X, the setting for this switch makes no difference, because it is not used. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 109: Dte/Dce Mode
QPC43 Peripheral Signaling card DTE/DCE mode Each serial port can be configured to connect to a terminal (DTE equipment) or a modem (DCE equipment). Instructions for configuring the DTE/DCE switches SW2, SW3, SW4, SW5, SW6, SW7, SW8, and SW9 are shown in Table 44: QSDI paddle board DTE/DCE mode switch settings on page 109.
Page 110: Qpc414 Network Card
Table 45: QPC441 3PE card installed in the NT4N41CP PII Core Net modules Jumper Settings: Set Jumper RN27 at E35 to "A". Switch Settings Module D20 switch position NT4N41 CP Core/Net modules only Group 0 Group 1 Core/Net 0 (Shelf 0) Group 2 Group 3 Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 111 QPC441 3-Port Extender cards Group 4 Group 5 Group 6 Group 7 Group 0 Group 1 Group 2 Group 3 Core/Net 1 (Shelf 1) Group 4 Group 5 Group 6 Group 7 Table 46: QPC441 3PE card installed in the NT5D21 modules Jumper Settings: Set Jumper RN27 at E35 to "A".
Page 112 Group 7 Table 47: QPC441 3PE card installed in the NT8D35 module Jumper Settings: Set Jumper RN27 at E35 to "A". Switch Settings D20 switch position Modules Option 81, 81C (Note Shelf Group Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 113: Qpc841 4-Port Serial Data Interface Card
QPC841 4-Port Serial Data Interface card QPC841 4-Port Serial Data Interface card Table 48: QPC841 port 1 and 2 address selection on page 113 through Table 51: QPC841 DTE or DCE selection on page 114 list option settings for the QPC841 4-Port SDI card. Table 48: QPC841 port 1 and 2 address selection Device number SW14...
Page 114 Mode Port 1—SW8 Port 1—SW9 DTE (terminal) on on DCE (modem) off off NT1P61 (Fiber) on off Port 2—SW6 Port 2—SW7 on on off off NT1P61 (Fiber) on off Port 3—SW4 Port 3—SW5 Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 115 QPC841 4-Port Serial Data Interface card Mode Port 1—SW8 Port 1—SW9 on on off off Port 4—SW2 Port 4—SW3 on on off off Circuit Card Reference July 2011...
Page 116 Option settings Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 117: Chapter 8: Nt1R20 Off-Premise Station Analog Line Card
Chapter 8: NT1R20 Off-Premise Station Analog Line card Contents This section contains information on the following topics: Introduction on page 117 Physical description on page 118 Functional description on page 119 Electrical specifications on page 125 Operation on page 127 Connector pin assignments on page 129 Configuring the OPS analog line card...
Page 118: Physical Description
LED goes out. If the LED continues to flash or remains weakly lit, replace the card. See Figure 20: OPS analog line card - faceplate on page 119. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 119: Functional Description
Functional description Figure 20: OPS analog line card - faceplate Functional description This functional description of the NT1R20 Off-Premise Station (OPS) analog line card is divided into two parts. First, a description of the card's control, signaling, and power interfaces is given, followed by a description of how the card itself functions.
Page 120: Card Interfaces
CS 1000 CPU over DS-30 network loops. Conversely, digital voice and signaling information from the CPU is sent over DS-30 network loops to the OPS analog line card where it is converted to analog form and applied to the line facility. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 121: Maintenance Communication
Functional description The OPS analog line card uses only eight of the 30 available timeslots for its eight line interfaces. The OPS analog line card can be configured in software to format PCM data in the µ-law or A-law conventions. Maintenance communication Maintenance communication is the exchange of control and status data between line or trunk cards and the CS 1000 CPU.
Page 122: Line Interface Units
LAN link to the controller card. The microcontroller controls the following: • reporting to the CE CPU through the card LAN link: - card identification (card type, vintage, and serial number) - firmware version - self-test status Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 123: Card Lan Interface
Functional description - programmed configuration status • receipt and implementation of card configuration: - programming of the CODECs - enabling/disabling of individual units or entire card - programming of input/output interface control circuits for administration of line interface unit operation - enabling/disabling of an interrupted dial tone to indicate call waiting - maintenance diagnostics - transmission loss levels...
Page 124: Port-To-Port Loss Configuration
The loss plan for the OPS analog line card determines port-to-port loss for connections between an OPS analog line card unit (port) and other IPE ports. LD 97 is used to configure systems for port-to-port loss. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 125: Electrical Specifications
Electrical specifications See Software Input/Output Reference — Administration (NN43001-611) for LD 97 service change instructions. Table 53: OPS analog line card - cable loop resistance and loss Cable length Cable loop loss (dB) (non-loaded Cable loop resistance (ohms) at 1kHz) 26 AWG 24 AWG 22 AWG...
Page 126: Power Requirements
The OPS line card supports up to three NE-C4A (3 REN) ringers on each line for either ONS or OPS applications. See Table 56: OPS analog line card - ringer limitations on page 127. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 127: Environmental Specifications
Operation Table 56: OPS analog line card - ringer limitations ONS Loop Range Maximum Number of Ringers (REN) 0–10 ohms > 10–460 ohms 0 – 10 ohms > 10 – 900 ohms > 900 – 2300 ohms Environmental specifications Table 57: OPS analog line card - environmental specifications on page 127 shows the environmental specifications of the OPS analog line card.
Page 128: Outgoing Calls
129). When the card detects the low-resistance loop, it prepares to receive digits. When the system is ready to receive digits, it returns a dial tone. Outward address signaling is then applied from the telephone in the form of loop (interrupting) dial pulses or DTMF tones. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 129: Connector Pin Assignments
Connector pin assignments Table 59: Call connection sequence-near-end station receiving call State Signal / Direction Far-end / Remarks Near-end Line card unit Group on tip, battery on ring No battery current drawn. idle High resistance loop Call request Low resistance loop Near-end station goes off-hook.
Page 130 Unit 2, Tip Unit 3, Ring Unit 3, Tip Unit 4, Ring Unit 4, Tip Unit 5, Ring Unit 5, Tip Unit 6, Ring Unit 6, Tip Unit 7, Ring Unit 7, Tip Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 131: Configuring The Ops Analog Line Card
Configuring the OPS analog line card Figure 22: OPS analog line card - typical cross connection example Configuring the OPS analog line card The line type, terminating impedance, and balance network configuration for each unit on the card is selected by software service change entries at the system terminal and by jumper strap settings on the card.
Page 132 3. Loss of untreated (no gain devices) metallic line facility. Upper loss limits correspond to loop resistance ranges for 26 AWG wire. Note: 4. The following are the default software impedance settings: ONP CLS OPX CLS Termination Impedance 600 ohms 600 ohms (TIMP): Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 133 Configuring the OPS analog line card Application On-premise station (ONS) Off-premise station (OPS) ONP CLS OPX CLS Balanced Impedance 600 ohms 3CM2 (BIMP): Note: 5. Gain treatment, such as a Voice Frequency Repeater (VFR) is required to limit the actual OPS loop loss to 4.5 dB, maximum. VFR treatment of metallic loops having untreated loss greater than 15 dB (equivalent to a maximum signaling range of 2300 ohms on 26 AWG wire) is not recommended.
Page 134 1. Set the jumpers on the NT1R20 OPS card. 2. Insert the OPS card in its assigned slot 3. Cross-connect off-premise telephones. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 135: Application
Application Application Off-premise station application The NT1R20 OPS analog line card is designed primarily to provide an interface for off-premise station lines. An OPS line serves a terminal – usually, but not exclusively, a telephone – remote from the PBX either within the same serving area as the local office, or through a distant office. The line is not switched at these offices;...
Page 136: Other Applications
Figure 24: Traditional OPS application configuration Other applications The operating range and built-in protection provisions of the NT1R20 OPS analog line card make it suitable for applications which are variants on the traditional configuration shown in Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 137: Transmission Considerations
Application Figure 24: Traditional OPS application configuration on page 136. Examples of such applications are: • a PBX in a central building serving stations in other buildings in the vicinity, such as in an industrial park, often called a campus environment. Facilities can be provided by the local exchange carrier or can be privately owned.
Page 138 A feature of many (though not all) standard telephones is that the loudness increases with decreased current. So as the line (PBX to OPS termination) facility gets longer and loss increases, the increased loudness of the telephone somewhat compensates for the higher Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 139 Application loss, assuming direct current feed from the PBX with constant voltage at the feeding bridge. However, this compensation is not available when: • the termination is a non-compensating telephone • the OPS port is served by a line card using a constant-current feeding bridge •...
Page 140 NT1R20 Off-Premise Station Analog Line card Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 141: Chapter 9: Nt4N39Aa Cp Pentium Iv Card
Chapter 9: NT4N39AA CP Pentium IV Card Contents This section contains information on the following topics: Introduction on page 141 Physical description on page 141 Functional description on page 144 Front panel connector pin assignments on page 145 Introduction The NT4N39AA Call Processor Pentium IV (CP PIV) Large System processor card was introduced in CS 1000 Release 4.5.
Page 142 • LEDs indication for activity on CompactFlashes and secondary IDE interface • reset Switch • INI switch • front panel handle part# 3688785, 3688784 (replacement for customer suggested parts 3686134, 3686135 which are now obsolete) Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 143 Physical description Figure 25: CP PIV card (front) Circuit Card Reference July 2011...
Page 144: Functional Description
CP PIV memory uses DDR SDRAM technology. The CP PIV provides a maximum of two GBytes using two verticall DIMM sockets to install off-the-shelf DIMM modules. CP PIV only supports DDR SDRAM DIMM memory with a supply voltage of +2.5 V. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 145: Front Panel Connector Pin Assignments
Front panel connector pin assignments are supportedThe memory data path is 72-bit wide. The Intel 855GME Host Bridge supports 64 Mbit, 128 MByte, 256 MByte and 512 Mbyte SDRAM technologies with a maximum ROW page size of 16 Kbytes and CAS latency of 2 or 2.5. The maximum height of the DIMM modules possible on CP PIV is one inch or 25.4 mm.
Page 146: 10/100/1000 Mbps Ethernet Ports
CPLD. Table 65: Front panel LED functionality on page 146 explains the function of each LED. Table 65: Front panel LED functionality Color Functionality Default LED1 Green Power ON LED Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 147: Itp Connector (25 Pin, Debug Only)
Front panel connector pin assignments Color Functionality Default LED2 Green Secondary IDE HD activity LED3 Green CompactFlash activity -Off LED4 Green CompactFlash activity -Off ITP connector (25 PIN, Debug Only) Table 66: ITP connector pin outs Signal Name Signal Name BPM0N BPM1N RESETN...
Page 148 NT4N39AA CP Pentium IV Card Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 149: Chapter 10: Nt5D11 And Nt5D14 Lineside T1 Interface Cards
Chapter 10: NT5D11 and NT5D14 Lineside T1 Interface cards Contents This section contains information on the following topics: Introduction on page 149 Physical description on page 150 Functional description on page 153 Electrical specifications on page 157 Installation and configuration on page 158 Man-Machine T1 maintenance interface software on page 175...
Page 150: Physical Description
The faceplate of the card is twice as wide as the other standard analog and digital line cards, and occupies two card slots. It comes equipped with four LED indicators. See Figure 27: Lineside T1 card faceplate on page 151. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 151 Physical description Figure 27: Lineside T1 card faceplate In general, the LEDs operate as shown in Table 67: NT5D14AA Lineside T1 faceplate LEDs on page 151. Table 67: NT5D14AA Lineside T1 faceplate LEDs State Definition STATUS On (Red) The NT5D14AA card either failed its self-test or it hasn't yet been configured in software.
Page 152 The YELLOW ALARM LED indicates that the Lineside T1 card has detected a yellow alarm signal from the terminal equipment side of the T1 link. See Man-Machine T1 maintenance Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 153: Functional Description
Functional description interface software on page 175 for information about T1 link maintenance. If the terminal equipment detects a red alarm condition, such as not receiving a signal or the signal has exceeded bit error thresholds or frame slip thresholds, it can send a yellow alarm signal to the Lineside T1 card, depending on whether or not the terminal equipment supports this feature.
Page 154: Card Interfaces
T1 timeslots, existing T1 test equipment remains compatible for diagnostic and fault isolation purposes. Card interfaces The Lineside T1 card passes voice and signaling data over DS-30X loops through the DS-30X Interfaces circuits and maintenance data over the card LAN link. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 155: T1 Interface Circuit
Functional description T1 interface circuit The Lineside T1 card contains one T1 line interface circuit which provides 24 individually configurable voice interfaces to one T1 link in 24 different time slots. The circuit demultiplexes the 2.56 Mbps DS-30X Tx signaling bitstreams from the DS-30X network loop and converts it into 1.544 mHz T1 Tx signaling bitstreams onto the T1 link.
Page 156 T1 link performance reporting and fault isolation testing. The interface is accessed through connections from the I/O panel to a terminal or modem. Multiple cards (up to 64) can be served through one MMI terminal or modem by cabling the cards together. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 157: Electrical Specifications
Electrical specifications Electrical specifications T1 channel specifications Table 68: Lineside T1 card - line interface unit electrical characteristics on page 157 provides specifications for the 24 T1channels. Each characteristic is set by dip switches. See Installation and configuration on page 158 for the corresponding dip switch settings. Table 68: Lineside T1 card - line interface unit electrical characteristics Characteristics Description...
Page 158: Environmental Specifications
175. Dip switch settings Begin the installation and configuration of the Lineside T1 card by selecting the proper dip switch settings for the environment. The Lineside T1 card contains two dip switches, each Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 159 Installation and configuration containing eight switch positions. They are located in the upper right corner of the motherboard circuit card as shown in Figure 29: Lineside T1 card - T1 protocol dip switch locations page 159. The configuration for these switches are shown in Table 71: Lineside T1 card-T1 Switch 1 (S1) dip switch settings on page 161 through...
Page 160 Estimate the distance between the Lineside T1 card and the hardwired local CPE, or the Telco demarc RJ48, for the carrier facility connecting the Lineside T1 and the remote CPE. Make the selection for this dip switch position based on this distance. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 161 Installation and configuration Line supervision on T1 failure This setting determines in what state all 24 ports of the Lineside T1 card appears to the CS 1000M, CS 1000E and Meridian 1in case of T1 failure. Ports can appear as either in the on- hook or off-hook states on T1 failure.
Page 162 Table 73: Lineside T1 card - T1 Switch 2 (S2) dip switch settings Dip Switch Characteristic Selection Number T1 framing On = D4 Off = ESF T1 Coding On = AMI Off = B8ZS Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 163: Installation
Installation and configuration Dip Switch Characteristic Selection Number 3–5 CPE or CSU distance Table 74: Lineside T1 card - CPE or CSU distance dip switch settings (Switch S2, positions 3 - 5) on page 163 Line processing on T1 link failure On = On-hook Off = Off-hook Daisy-chaining to MMI...
Page 164 13 and 14 The Lineside T1 card cannot be installed into the following card slot pairs: Restricted: Motherboard/Daughterboard 2 and 3 3 and 4 6 and 7 10 and 11 11 and 12 Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 165: Cabling The Lineside T1 Card
Installation and configuration 14 and 15 If the Lineside T1 card must be installed into one of the restricted card slot pairs, rewire the IPE module card slot to the I/O panel by installing an additional NT8D81 cable from the Lineside T1 card motherboard slot to the I/O panel.
Page 166 Cabling from the I/O panel at the Main Distribution Frame All Lineside T1 connections can be made at the main distribution frame (MDF) if it is preferred to not use the NT5D13AA Lineside T1 I/O cable at the I/O panel. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 167 Installation and configuration Connecting to the MDF To make the connections at the MDF, follow this procedure: 1. Punch down the first eight pairs of a standard telco 25-pair female-connectorized cross-connect tail starting with the first tip and ring pair of the Lineside T1 motherboard card slot on the cross-connect side of the MDF terminals.
Page 168 DB9 female away from MMI (P4) Wired as DTE Control 1 Data is transmitted on pin 2 (TXD) and received on pin 3 (RXD) Control 2 Away from MMI terminal Transmit Data Away from MMI terminal Receive Data Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 169 Installation and configuration T1 connections T1 signaling for all 24 channels is transmitted over P2 connector pins 1, 3, 9, and 11 as shown Table 77: Lineside T1 card - NT5D13AA connector pinouts on page 168. Plug the DB15 male connector labeled "P2" into the T1 link. T1 transmit and receive pairs must be turned over between the Lineside T1 card and CPE equipment that is hardwired without carrier facilities.
Page 170 DB-9 female to DB-9 male straight-through extension cable, available at any PC supply store. Figure 31: Lineside T1 card - connecting two or more cards to the MMI Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 171: Terminal Configuration
Installation and configuration Terminal configuration For the MMI terminal to be able to communicate to the Lineside T1 card, the interface characteristics must be configured to the following: • Speed – 1200 or 2400 bps, depending on the setting of switch position 1 of Switch 1 •...
Page 172 Originating calls are outgoing from the terminal equipment. Terminating calls are incoming to the terminal equipment. The Lineside T1 card does not support battery reversal answer and disconnect supervision on originating calls. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 173: Clocking Requirement
Clocking Requirement After the software is configured, power up the card and verify the self test results. The STATUS LED on the faceplate indicates whether or not the Lineside T1 card has passed its self test, and is functional. When the card is installed, this LED remains lit for two to five seconds as the self-test runs.
Page 174 DSUB connector on the back panel formerly used for the 10Base-T AUI connection. Figure 34: Option 11C Mini chassis or Succession 1.0 MG chassis on page 175 shows the 10Base-T AUI connection of the Option 11C Mini chassis or Succession 1.0 MG chassis. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 175: Man-Machine T1 Maintenance Interface Software
Man-Machine T1 maintenance interface software Figure 34: Option 11C Mini chassis or Succession 1.0 MG chassis 3. Use an MGC Breakout Adapter for Option 11C (NTDW63AAE5) • Connect the adapter to 25 pairs MDF connector at Slot 0 • Connect the MGC DECT Clock Reference Cable (NTDW67AAE5) to 15-pin DSUB connector on the Breakout Adapter.
Page 176 Lineside T1 card automatically performs all alarm level 2 functions. The MMI also sends a yellow alarm to the distant end CPE or CSU. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 177: Login And Password
Man-Machine T1 maintenance interface software Alarms can be configured to self-clear or not self-clear when the alarm condition is no longer detected. All alarms activated produce a record in an alarm log. The alarm log maintains records for the most recent 100 alarms and can be displayed, printed and cleared. The alarm log displays or prints the alarms listing the most recent first in descending chronological order.
Page 178: Basic Commands
USAGE: Display [Alarm | Status | Perform | History] [Pause] HELP USAGE: Help | ? USAGE: Set [Time | Date | Alarm | Clearing | Name | Memory] TEST USAGE: Test [Carrier All] QUIT USAGE: Quit Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 179 Man-Machine T1 maintenance interface software Notation Used: CAPS - Required Letters [ ] - Optional | - Either/Or Each of these commands can be executed by typing the first letter of the command or by typing the entire command. Command sets are entered by typing the first letter of the first command, a space, and the first letter of the second command or by typing the entire command.
Page 180: Configuring Parameters
• Alarm Level 1 (AL1) consists of activity with an error threshold above the AL1 setting but below AL2 setting. This is a minor unsatisfactory condition. In this situation, the external Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 181 Man-Machine T1 maintenance interface software alarm hardware is activated by closing the normally open contact. The RED ALARM LED on the faceplate lights and an alarm message is created in the alarm log and the MMI terminal. • Alarm Level 2 (AL2) consists of activity with an error threshold above the AL2 setting. This is an unsatisfactory condition.
Page 182 Sets the allowable bit errors per second (from 3 to 9) before alarm level –6 1 is activated. Factory default is 10 AL1 Duration Sets the duration in seconds (from 1 to 3,600 seconds) that alarm level 1 is activated. Factory default is 10 seconds. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 183 Man-Machine T1 maintenance interface software Option Description AL2 Threshold Sets the allowable bit errors per second (from 3 to 9) before alarm level 2 is activated. Factory default is 10 AL2 Duration Sets the duration in seconds (from 1 to 3,600 seconds) that alarm level 2 is activated.
Page 184: Alarm Operation And Reporting
Alarm Enable The Alarm Enable (A E) command set does the opposite of the Alarm Disable command set. It enables the external alarm contacts. When this command set is typed in, the MMI displays Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 185 Man-Machine T1 maintenance interface software the message "Alarms Enabled." In this mode, yellow alarms can be sent and the Lineside T1 card can enter line processing mode. Clear Alarm The Clear Alarm (C A) command set clears all activity initiated by an alarm: the external alarm hardware is deactivated (the contact normally open is reopened), the LED light goes out, an entry is made in the alarm log of the date and time when the alarm clears, and line processing ceases (for alarm level 2 only).
Page 186: Performance Counters And Reporting
Each column, except the error counter, indicates the number of errors in the current hour and is reset to zero every hour on the hour. When these counters are reset to zero, the performance Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 187: Testing
Man-Machine T1 maintenance interface software counter values are put into the history log. The error counter indicates the number of errors that occurred because the error counter was cleared. Display History Enter the Display History (D H) command set to display performance counters for each hour for the past 24 hours.
Page 188 To isolate the failure to the T1 link, tests 1 and 2 must be run in tandem. Figure 37: MMI external loopback test on page 189 demonstrates how an external loopback is applied to the T1 link. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 189: Applications
Applications Figure 37: MMI external loopback test Test 3, network loopback, loops the received T1 data back toward the CPE equipment. No test data is generated or received by the Lineside T1 card. If test 2 passes but test 3 fails, it indicates that the CPE device is defective.
Page 190 T1 facilities, providing a telephone at a remote site with access to analog (500/2500-type) telephone lines. See Figure 40: Lineside T1 interface in off-premise application on page 191. An audible message-waiting indicator can be provided as well. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 191 Applications Figure 40: Lineside T1 interface in off-premise application Similarly, the Lineside T1 can be used to provide a connection between the system and a remote Norstar system. See Figure 41: Lineside T1 interface connection to Norstar system page 192. In this case, channel banks would not be required if the Norstar system is equipped with a T1 interface.
Page 192 NT5D11 and NT5D14 Lineside T1 Interface cards Figure 41: Lineside T1 interface connection to Norstar system Note: The Lineside T1 card audio levels must be considered when determining the appropriateness of an application. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 193: Chapter 11: Nt5D33 And Nt5D34 Lineside E1 Interface Cards
Chapter 11: NT5D33 and NT5D34 Lineside E1 Interface cards Contents This section contains information on the following topics: Introduction on page 193 Physical description on page 194 Functional description on page 199 Electrical specifications on page 203 Installation and Configuration on page 205 Installation on page 211...
Page 194: Physical Description
Amphenol connector on the IPE Input/Output (I/O) panel. The I/O panel connector connects to a E1 line, external alarm and an MMI terminal or modem, using the NT5D35 or NT5D36 lineside I/O cable available from Nortel. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 195: Faceplate
Physical description Faceplate The LEI faceplate is twice as wide as the other standard analog and digital line cards. It occupies two card slots. The LE1 faceplate has four LEDs. SeeFigure 36: MMI local loopback test on page 188 Figure 42: NT5D33AB LEI card - faceplate on page 196 (IPE version), and Figure 43: NT5D34AB LEI card - faceplate on page 197 (Cabinet system).
Page 196: Circuit Card Reference July
NT5D33 and NT5D34 Lineside E1 Interface cards Figure 42: NT5D33AB LEI card - faceplate Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 197 Physical description Figure 43: NT5D34AB LEI card - faceplate The LEDs give status indications on the operations as described in Table 83: LEI card LED operation on page 197. Table 83: LEI card LED operation Operation Status Line card Red alarm E1 near end Yellow alarm E1 far end...
Page 198 222 for information about E1 link maintenance. If the card detects that tests are being run or that alarms are disabled through the MMI, the LED lights and remains lit until these conditions are no longer detected, then it turns off. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 199: Functional Description
Functional description Functional description Figure 44: LEI card - block diagram on page 199 shows a block diagram of the major functions contained on the LEI card. Each of these functions is described on the following pages. Figure 44: LEI card - block diagram Overview The LEI card is an IPE line card that provides a cost-effective, all-digital connection between E1-compatible terminal equipment (such as voice mail systems, voice response units, trading...
Page 200: Card Interfaces
Signaling and control The LEI also contains signaling and control circuits that establish, supervise, and take down call connections. These circuits work with the system controller to operate the E1 line interface Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 201: Card Control Functions
Functional description circuit during calls. The circuits receive outgoing call signaling messages from the controller and return incoming call status information to the controller over the DS-30X network loop. Card control functions Control functions are provided by a microcontroller and a card LAN link on the LEI. A sanity timer is provided to automatically reset the card if the microcontroller stops functioning for any reason.
Page 202: Sanity Timer
45: CAS+ compliance on page 203. This enhancement provides several additional benefits for systems with ELEI cards installed. Note: MDECTS and ELEI (operating in enhanced mode) cannot be configured on the same system. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 203: Electrical Specifications
Electrical specifications Figure 45: CAS+ compliance Key Benefits of using CAS+ signaling (ELEI mode) over traditional A/B bit signaling (LEI mode) include: 1. Calling Line ID Presentation (CLIP) When an incoming call over the TDM/IP network or a CS 1000originated call is directed towards the CAS+ compliant system, Calling Line ID can be provided over the CAS+ interface.
Page 204: Power Requirements
Table 86: LEI card - environmental specifications on page 204 shows the environmental specifications of the LEI. Table 86: LEI card - environmental specifications Parameter Specifications Operating temperature – normal 15° to +30° C (+59° to 86° F), ambient Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 205: Installation And Configuration
Installation and Configuration Parameter Specifications Operating temperature – short term 10° to +45° C (+50 to 113° F), ambient Operating humidity – normal 20% to 55% RH (non-condensing) Operating humidity – short term 20% to 80% RH (non condensing) Storage temperature –50°...
Page 206: Mmi Port Speed Selection
The LEI is capable of interfacing with LTU equipment using either AMI or HDB3 coding. Make the selection for this dip switch position based on the type of coding the LTU equipment supports. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 207: Line Supervision On E1 Failure
Installation and Configuration Figure 46: LEI card - E1 protocol dip switch locations Line supervision on E1 failure This setting determines in what state all 30 LEI ports appear to the CS 1000E, CS 1000M, and Meridian 1in case of E1 failure. Ports can appear as either in the "on-hook" or "off-hook" states on E1 failure.
Page 208: Daisy-Chaining To Mmi
(Switch S1, positions 3-6) positions 3-6) page 209 page 209 Card type for ringer XTI = 19 allocation XMLC = 18 E1 signaling Table 88: LEI card - signaling-type dip switch settings page 209 Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 209 Installation and Configuration When dip switch #1, positions 2 and 8 are set to "Table," AB Bits are configured by the user through the Set Mode MMI command (see Set Mode on page 231). Otherwise, the signaling scheme selected by dip switch 1, positions 2 and 8 are used. Table 88: LEI card - signaling-type dip switch settings Switch #1 Characteristic...
Page 210 After the card is installed, display the dip switch settings using the MMI command Display Configuration (D C). See Man-Machine E1 maintenance interface software on page 222 for details on this and the rest of the available MMI commands. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 211: Installation
Installation Installation Because of the wiring in some of the system modules and cabinets, the LEI only works in certain card slot pairs. These restrictions depend on the type of module or cabinet. In all other modules or cabinets where the conditions listed below do not exist, the LEI works in any two adjacent card slots: •...
Page 212: Cabling The Lei Card
This cable consists of a 25-pair amphenol connector (P1) on one end which plugs into the I/O panel. The other end has four connectors: 1. a DB15 male connector (P2), which plugs into the E1 line 2. a DB9 male connector (P3), which plugs into an external alarm system Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 213 Installation 3. a second DB9 male connector (P5), which connects to an MMI terminal or modem 4. a DB9 female connector (P4), which connects to the next LEI's P4 connector for MMI daisy chaining In a coaxial E1 installation, make the connection from the I/O panel to the E1 link and other external devices through the NT5D36AA lineside E1 I/O cable.
Page 214 3 (TXD) Control 1 Control 2 Ground Control 1 Control 2 DB9 female away from MMI terminal (P4) Away from MMI terminal, transmit data Away from MMI terminal, receive data Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 215: E1 Connections
Installation E1 Connections For twisted-pair installations, E1 signaling for all 30 channels is transmitted over P2 connector pins 1, 3, 9, and 11, as shown in Table 94: LEI card - lineside E1 I/O cable pinouts on page 214. Plug the DB 15 male connector labeled "P2" into the E1 link. E1 transmit and receive pairs must be turned over between the LEI and the CPE that is hardwired without carrier facilities.
Page 216 5. If two LEIs are too far apart to connect the "P4" and "P5" connectors connect them with an off-the-shelf DB9 female to DB9 male straight-through extension cable, available at any PC supply store. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 217: Terminal Configuration
Installation Figure 47: LEI card - connecting two or more cards to the MMI Terminal configuration For the MMI terminal to be able to communicate to the LEI, the interface characteristics must be set to: • speed – 1200 or 2400 bps •...
Page 218 Table 95: Card unit number to E1 channel mapping Item E1 Channel Number Motherboard Motherboard Motherboard Motherboard Motherboard Motherboard Motherboard Motherboard Motherboard Motherboard Motherboard Motherboard Motherboard Motherboard Motherboard Motherboard Daughterboard Daughterboard Daughterboard Daughterboard Daughterboard Daughterboard Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 219: Disconnect Supervision
Installation Item E1 Channel Number Daughterboard Daughterboard Daughterboard Daughterboard Daughterboard Daughterboard Daughterboard Daughterboard Disconnect supervision The LEI supports far-end disconnect supervision by opening the tip side toward the terminal equipment upon the system's detecting a disconnect signal from the far-end on an established call.
Page 220: Clocking Requirement
The following sections elaborate on how to connect an MGC DECT Clock Reference Cable. Pre requisites The pre requisites for connecting an MGC DECT Clock Reference Cable are the following: MGC DECT Clock Reference Cable --- NTDW67AAE5. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 221 Installation Figure 48: MGC DECT Clock Reference Cable on page 221 shows the MGC DECT Clock Reference Cable. It is used to provide clock reference between Media Gateway Cabinet/ chassis. Figure 48: MGC DECT Clock Reference Cable Connecting MGC DECT Clock Reference Cable 1.
Page 222: Man-Machine E1 Maintenance Interface Software
205 for instructions on how to install the cabling and configure the terminal for the MMI. The following sections describe the options available through the LEI's MMI terminal and explain how to set up, configure, and use the MMI. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 223: Alarms
Man-Machine E1 maintenance interface software The MMI provides the following maintenance features: • configurable alarm parameters • E1-link problem indicator • current and historical E1-link performance reports • E1 verification and fault isolation testing • configuration of A\B bits (North American Standard, Australian P2, or customized settings are available) Alarms The MMI may be used to activate alarms for the following E1-link conditions:...
Page 224: Login And Password
See Table 92: LEI card - NT8D37 IPE module vintage level port cabling on page 211. For example, to login to a card located in shelf 13, card slot 4, type: Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 225: Basic Commands
Man-Machine E1 maintenance interface software L 13 4 <CR> Spaces are inserted between the login command (L), the shelf address, and the card slot address. The MMI prompts for a password. The password is "LEILINK," and it must be typed in all capital letters.
Page 226 If it is a daisy-chained system, be certain to log out when finished with configuration. In a daisy-chained system, only one card can occupy the bus at a given time and all other LEIs cannot notify the MMI of alarms unless logged-out of configuration mode. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 227: Configuring Parameters
Man-Machine E1 maintenance interface software Command Description Set Alarm. Sets alarm parameters, such as the allowable bit-errors per second, threshold, and alarm duration. Set Clearing. Sets the alarm self-clearing function, "enable" or "disable." Set Date. Sets the date or verifies the current date. Set Mode.
Page 228 Allowable Duration Periods per second in power of 10 2,000/ second 1-21 seconds 200/second 1-218 seconds 20/second 1-2148 seconds 2.0/second 1-3600 seconds 2.0/10 seconds 10-3600 seconds 2.0/100 seconds 100-3600 seconds 2.0/1000 seconds 1000-3600 seconds Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 229 Man-Machine E1 maintenance interface software The duration value is set in seconds and can be set from 1 to 3,600 seconds (1 hour). This duration value indicates how long the alarm condition must last before an alarm is declared. Low bit-error rates (10 through 10 ) are restricted to longer durations because it takes more than one second to detect an alarm condition above10...
Page 230 231. Release 2 of AB vintage LEIs gives the administrator the option of using the signaling described above, or configuring the LEI to take its channel idle immediately after sending the call- Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 231: Set Mode
Man-Machine E1 maintenance interface software disconnect message. A YES response to the S S command, the default configuration for Release 2 (and later) boards, configures the LEI to operate in this way. See Figure 54: Set Simple (S S) yes screen on page 231.
Page 232 This value is required. Idle RECEIVE — This is the value that the LEI expects to see from the CPE when it is in the idle state. This value is required. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 233 Man-Machine E1 maintenance interface software Blocking RECEIVE — This is the value that the LEI expects to see from the CPE when the customer equipment is in the blocking or fault state and is unable to accept new calls. Set this value to N if this state is not needed.
Page 234 This value defaults to 0 which relies on the M-1 to observe the proper guard time. If a non-zero value is entered, off-hook from the CPE and Ringer-On commands from the M1/SL100 is ignored until this timer has expired. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 235: Display Configuration (D C)
Man-Machine E1 maintenance interface software Display Configuration (D C) The Display Configuration (D C) command displays the various configuration settings established for the LEI. Entering this command causes a screen similar to Figure 58: Display Configuration (D C) screen on page 235 to appear. Figure 58: Display Configuration (D C) screen Alarm operation and reporting The MMI monitors the E1 link according to parameters established through the Set Alarm...
Page 236 MMI scrolls the log until the screen is full, then stops. When ready to see the next screen, press any key. The display shows another screen and stops again. This continues until the entire log is displayed. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 237: Performance Counters And Reporting
Man-Machine E1 maintenance interface software Clear Alarm Log Clear all entries in the alarm log by typing the Clear Alarm Log (C A L) command. Display Status The Display Status (D S) command displays the current alarm condition of the E1 link as well as the on-hook or off-hook status of each of the 30 ports of the LEI.
Page 238 MMI scrolls until the screen is full, then stops. When ready to see the next screen, press any key. The display shows one more screen, and stops again. This continues until the entire display is shown. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 239: Testing
Man-Machine E1 maintenance interface software Display History Entering the Display History (D H) command displays performance counters for each hour of the past 24 in reverse chronological order, beginning with the last full hour. A screen similar to Figure 62: Display History (D H) screen on page 239 appears.
Page 240 If this test fails, it indicates that the LEI is defective. Figure 65: MMI Local loopback test on page 241 illustrates how the signaling is looped back toward itself. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 241 Man-Machine E1 maintenance interface software Figure 65: MMI Local loopback test Test 2, external loopback, applies an external loopback to the E1 link. Test data is generated and received by the LEI on all timeslots. If test 1 passes but test 2 fails, it indicates that the E1 link is defective between the LEI and the external loopback location.
Page 242: Applications
(500/2500-type) telephone line functionality. See Figure 69: LEI in off-premise extension application page 243. Audible Message Waiting Indicator can be provided as well. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 243 Applications Figure 69: LEI in off-premise extension application Similarly, use the LEI to provide a connection between the system and a remote Norstar system. See Figure 70: LEI connection to Norstar system on page 243. In this case, channel banks are not required if the Norstar system is equipped with an E1 interface. Note: Consider LEI audio levels when determining the appropriateness of an application.
Page 244 NT5D33 and NT5D34 Lineside E1 Interface cards Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 245: Chapter 12: Nt5D60/80/81 Class Modem Card (Xcmc)
Chapter 12: NT5D60/80/81 CLASS Modem card (XCMC) Contents This section contains information on the following topics: Introduction on page 245 Physical description on page 246 Functional description on page 246 Electrical specifications on page 249 Configuration on page 251 Introduction The NT5D60/80/81 CLASS Modem card supports the Custom Local Area Signaling Services (CLASS) feature.
Page 246: Physical Description
If the CLASS Modem card receives more bytes than were specified in the initiating message, then the additional bytes are discarded and not included in the CND memory buffer. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 247 Functional description Once all of the CND information is stored in the memory buffer, the CLASS Modem card begins transmission when requested by the system software. Data is sent one ASCII character at a time. The CLASS Modem card inserts a start and stop bit to each ASCII character sent. The transmission of the calling party name/number to the terminating telephone is accomplished through asynchronous FSK simplex-mode transmission at 1200 bits/second over a 2-wire loop, in accordance with the Bell 202 standard.
Page 248 Table 101: Time slot mapping page 248 shows time slot mapping for the CLASS modem card. Table 101: Time slot mapping XCMC mapping of TNs DS30X timeslot Modem units on the CLASS Modem card module 0, 00 Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 249: Electrical Specifications
Electrical specifications XCMC mapping of TNs DS30X timeslot Modem units on the CLASS Modem card module 1, 00 module 2, 00 module 3, 00 Electrical specifications This section lists the electrical characteristic of the CLASS modem card. This section lists the electrical characteristic of the CLASS modem card. Data transmission specifications Table 102: CLASS modem card-data transmission electrical characteristics on page 250...
Page 250: Power Requirements
5 to 95% RH (non-condensing) Storage temperature –50° C to +70° C (–58 ° F to +158 ° F) Table 105: CLASS modem card - environmental specifications on page 251 shows the environmental specifications of the card. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 251: Configuration
Configuration Table 105: CLASS modem card - environmental specifications Parameter Specifications Operating temperature 0° C to +65° C (+32 ° F to +149 ° F) Operating humidity 5 to 95% RH (non-condensing) Storage temperature –50° C to +70° C (–58 ° F to +158 ° F) Configuration The NT5D60/80/81 CLASS Modem card has no user-configurable jumpers or switches.
Page 252 NT5D60/80/81 CLASS Modem card (XCMC) Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 253: Chapter 13: Nt5D97 Dual-Port Dti2 Pri2 Card
Chapter 13: NT5D97 Dual-port DTI2 PRI2 card Contents The following are the topics in this section: Introduction on page 253 Physical description on page 254 Functional description on page 271 Architecture on page 281 Operation on page 285 Introduction This section contains information required to install the NT5D97 Dual-port DTI2/PRI2 (DDP2) card.
Page 254: Physical Description
• PRI2 link is not in OOS or Local Alarm mode state. • PRI2 link is not transmitting a Remote Alarm pattern. • PRI2 link is not receiving a Remote Alarm Indication from a remote facility. All other conditions Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 255: Nt5D97 Faceplate
Physical description NT5D97 faceplate Figure 71: NT5D97 faceplate on page 256 illustrates the faceplate layout for the NT5D97 DDP card. The faceplate contains an enable/disable switch; a DDCH status LED; 6 x 2 trunk port status LEDs; and six external connectors. Table 107: External connectors and LEDs page 256 shows the name of each connector, its designation with respect to the faceplate and the name and description of the card it is connected to.
Page 256 Card Enable/disable switch protected Connector Unit 0 Clock 0 RJ11 Connector Connects reference clock 0 to Clock Controller card 0 Unit 0 Clock 1 RJ11 Connector Connects reference clock 0 to Clock Controller card 1 Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 257 Physical description Function Faceplate Type Description Designator Unit 1 Clock 0 RJ11 Connector Connects reference clock 1 to Clock Controller card 0 Unit 1 Clock 1 RJ11 Connector Connects reference clock 1 to Clock Controller card 1 J5 TRK 9 Pin Female D Two external E1 Trunk 0 and Trunk 1 Connector J6 DCH...
Page 258 When the dual colored LED is red, it indicates the on-board DDCH is present but disabled. When the dual colored LED is green, it indicates the on-board DDCH is present and enabled. If a DDCH is not configured on the DDP2 card, this lamp is not lit. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 259: Port Definitions
Physical description Unit 0 Clk Connectors Two RJ11 connectors for connecting: • Digital trunk unit 0 recovered clock to primary or secondary reference source on clock controller card 0. • Digital trunk unit 0 recovered clock to primary or secondary reference source on clock controller card 1.
Page 260: System Capacity And Performance
The DCH has one D-Channel unit, the DDCH has two D-Channel units, and the MSDL has a maximum of four units. Therefore, the total number of D-Channel is derived by the following formula: Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 261: Cable Requirements
Physical description Total_Num_DCH-Units = Num_DCHx1 + Num_DDCHx2 + Num_MSDLx4 Therefore, Total_Num_DCH-Units in any given system is between 0-63. CPU capacity Using a NT5D97 DDP2 card instead of DTI2/PRI2 cards does not increase the load on the CPU. The DDP2 replaces an ENET card and two DTI2/PRI2 cards. Emulating the ENET card and the overall CPU capacity is not impacted by using a DDP2 card instead of a DTI2/PRI2 card.
Page 262 TRK port (P1, D-type 9 pin male) on the DDP2 faceplate to the I/O filter (P2, P3 D-type 9 pin males). Figure 72: NTCK45AA Table 111: NTCK45AA cable pins on page 263 which follows lists the pin attributes for the NTCK45AA cable. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 263 Physical description Table 111: NTCK45AA cable pins Cable Name Description Color DDP2 I/O Pane pins pins T-PRI0TX Trunk 0 Transmit Tip Black P1-1 P2-6 R-PRI0TX Trunk 0 Transmit Ring P2-2 P2-7 T-PRI0RX Trunk 0 Receive Tip Black P1-3 P2-2 R-PRI0RX Trunk 0 Receive Ring White P1-4...
Page 264 Table 113: NTCK78AA cable pins on page 264 lists the pin attributes for the NTCK78AA cable. Table 113: NTCK78AA cable pins Cable Name Description Color DDP2 NCTE pins pins T-PRI0TX Trunk 0 Transmit Tip Black P1-1 P2-1 Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 265 Physical description Cable Name Description Color DDP2 NCTE pins pins R-PRI0TX Trunk 0 Transmit P1-2 P2-9 Ring T-PRI0RX Trunk 0 Receive Tip Black P1-3 P2-3 R-PRI0RX Trunk 0 Receive White P1-4 P2-11 Ring GND Shield Wire Bare P1 Case P2-2 GND Shield Wire Bare P1 Case P2-4...
Page 266 DDP2 card to Clock Controller cable, connecting each of the CLK0 or CLK1 ports on the DDP2 faceplate to the primary or secondary source ports on Clock Controller card 0 or 1. Figure 76: NTCG03AA/AB/AC/AD Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 267 Physical description MSDL/DCH cables External DCH cable The NTCK46 cable connects the DDP2 card to the NT6D11AF/NT5K75AA/NT5K35AA D- Channel Handler card. The cable is available in four different sizes: • NTCK46AA (6 ft.) - DDP2 to DCH cable • NTCK46AB (18 ft.) - DDP2 to DCH cable •...
Page 268: Cable Diagrams
I/O panel. Here, the DDP2 faceplate is cabled directly to the NCTE. Note: Because of several clock cabling options exists, none is represented in the diagrams. Refer Clock configurations on page 283 for a description on each available option. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 269 Physical description Figure 79: DDP2 cable for systems with an I/O panel Circuit Card Reference July 2011...
Page 270 NT5D97 Dual-port DTI2 PRI2 card Figure 80: DDP2 cable for systems without an I/O panel Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 271: Functional Description
Functional description Functional description NT5D97 circuit card locations Each NT5D97 card requires one slot on a shelf. NT5D97 cards can be placed in any card slot in the network bus. Note in all cases - If an NT8D72BA/NTCK43 card is being replaced by a DDP2 card, the D- channel Handler can be reconnected to the DDP2 card, or removed if an onboard NTBK51DDCH card is used.
Page 272 Port 0 Port 1 Trunk 0 Trunk 1 and 1 General Purpose The following parameters are set by DIP switches. The boldface font shows the factory set- Figure 81: Dip switches for NT5D97AA/AB Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 273: Trunk Interface Switches For Nt5D97Aa/Ab
Functional description Trunk interface switches for NT5D97AA/AB Impedance level and unit mode The S9/S15 switch selects the impedance level and loop operation mode on DEI2 OR PRI2. Refer to Table 116: Impedance level and loop mode switch settings on page 273. Table 116: Impedance level and loop mode switch settings Switch Description...
Page 274 DCH Address select switch for NTBK51AA/NTBK51CA daughterboard for NT5D97AA/AB In case of an on-board NTBK51AA/NTBK51CA D-channel daughterboard, set of four switches (S3) provide the daughterboard address. Refer to Table 128: Trunk 1 switches on page 278. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 275 Functional description Note: Switch 8 of S3 (S3-8) does not require a switch setting to select between the on-board NTBK51AA/NTBK51CA D-channel daughterboard and an external DCHI/MSDL. The NT5D97 detects when the on-board NTBK51AA/NTBK51CA D-channel daughterboard is used. Table 121: DCH mode and address switch settings Switch Description S3 switch setting...
Page 276: Nt5D97Ad Dip Switch Settings
Receiver Interface General Purpose Refer to DIP switch locations in Figure 82: Dip switches locations for NT5D97AD page 277. The following parameters are set by DIP switches. The boldface font shows the factory set- Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 277 Functional description Figure 82: Dip switches locations for NT5D97AD Trunk interface switches for NT5D97AD Trunk 0 switches Switch S12 gives the MPU information about its environment. Circuit Card Reference July 2011...
Page 278 Impedance S6-1 S6-2 S6-3 S6-4 75 ohm 120 ohm Trunk 1 switches for NT5D97AD Table 128: Trunk 1 switches Switch Function General Purpose...See Table 124: General purpose switches for NT5D97AD on page 278 Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 279: Dch Address Select Switch For Ntbk51Aa/Ntbk51Ca Daughterboard For Nt5D97Ad
Functional description Switch Function TX Mode...See Table 125: TX mode switches for NT5D97AD page 278 S13, S14 & S15 LBO...See Table 126: LBO switches for NT5D97AD page 278 RX Impedance...See Table 127: Receiver interface switches for NT5D97AD on page 278 Ring ground switches for NT5D97AD Switch S16 selects which ring lines connect to ground.
Page 280: Msdl External Card
Switch number Function S9_1-10 S8_1-10 Table 132: Switch setting for MSDL external card on page 280 to set the card address. Table 132: Switch setting for MSDL external card Switch Setting DNUM (LD 17) Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 281: Architecture
Architecture Architecture Clock operation There are two types of clock operation - tracking mode and free-run mode. Tracking mode In tracking mode, the DDP2 loop supplies an external clock reference to a clock controller. Two DDP2 loops can operate in tracking mode, with one defined as the primary reference source for clock synchronization, the other defined as the secondary reference source.
Page 282: Reference Clock Errors
If the clock controller detects a reference-clock error, the reference clocks are switched. Automatic clock recovery A command for automatic clock recovery can be selected in LD 60 with the command EREF. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 283: Automatic Clock Switching
Architecture A DDP2 loop is disabled when it enters a local-alarm condition. If the local alarm is cleared, the loop is enabled automatically. When the loop is enabled, clock tracking is restored in the following conditions: • If the loop is assigned as the primary reference clock but the clock controller is tracking on the secondary reference or in free-run mode, it is restored to tracking on primary.
Page 284 Connector Clk0 provides a Ref 1 clock source from Unit 0. Connector Clk1 provides a Ref 2 clock source from Unit 0. Connector Clk0 provides a Ref 1 clock source from Unit 1. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 285: Operation
Operation Clock Notes Option Connector Clk1 provides a Ref 2 clock source from Unit 1. Refer to Figure 87: Clock Controller - Option 4 on page 288. Figure 84: Clock Controller - Option 1 Operation The following discussion describes possible scenarios when replacing a digital trunk NT8D72BA PRI2 card or QPC536E DTI2 card or NTCK43 Dual PRI card configuration with a NT5D97 DDP2 card configuration.
Page 286 NT5D97 Dual-port DTI2 PRI2 card Figure 85: Clock Controller - Option 2 Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 287 Operation Figure 86: Clock Controller - Option 3 Circuit Card Reference July 2011...
Page 288 QPC414 card. The other QPC414 card can then be replaced by the NT5D97 DDP2. Caution: The static discharge bracelet located inside the cabinet must be worn before handling circuit cards. Failure to wear the bracelet can result in damage to the circuit cards. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 289 Operation Installing the NT5D97 1. Determine the cabinet and shelf location where the NT5D97 is to be installed. The NT5D97 can be installed in any card slot in the Network bus. 2. Unpack and inspect the NT5D97 and cables. 3. If a DDCH is installed, refer to the section Removing the NT5D97 on page 289.
Page 290: Configuring The Nt5D97
• You cannot define one of the DDP2 loops for the NTBK51AA/NTBK51CA DDCH, and the other loop for the NT6D11AF/NT5K75AA/NT5K35AA DCH card or the NT6D80 MSDL. • When configuring the NT5D97 DDP2 in DTI2 outgoing dial pulse mode, a Digit Outpulsing patch is required. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 291: Testability And Diagnostics
Operation Testability and diagnostics The DDP2 card supports testing and maintenance functions through the following procedures: • Self-test upon power up or reset • Signalling test performed in the LD 30 • Loopback tests, self tests, and continuity tests performed by LD 60 and LD 45 •...
Page 292 NT5D97 Dual-port DTI2 PRI2 card Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 293: Chapter 14: Nt5K02 Flexible Analog Line Card
Chapter 14: NT5K02 Flexible Analog Line card Contents This section contains information on the following topics: Introduction on page 293 Applications on page 294 Introduction The NT5K02 Flexible Analog Line card provides an interface for up to 16 analog (500/2500- type) telephones equipped with either ground button recall switches, high-voltage Message Waiting lamps, or low-voltage Message Waiting LEDs.
Page 294: Applications
• NT5K02NA ground button, low-voltage message Waiting, analog line card typically used in Sweden • NT5K02PA ground button, low-voltage Message Waiting, analog line card typically used in Switzerland • NT5K02QA ground button, low-voltage Message Waiting, analog line card typically used in the United Kingdom Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 295: Chapter 15: Nt5K21 Xmfc/Mfe Card
Chapter 15: NT5K21 XMFC/MFE card Contents This section contains information on the following topics: Introduction on page 295 MFC signaling on page 295 MFE signaling on page 297 Sender and receiver mode on page 298 Physical specifications on page 300 Introduction The XMFC/MFE (Extended Multi-frequency Compelled/Multi-frequency sender-receiver) card is used to set up calls between two trunks.
Page 296: Signaling Levels
Table 135: MFC Frequency values Digit Forward direction DOD-Tx, DID- backward direction DOD-Rx, DID- 1380 Hz + 1500 Hz 1140 Hz + 1020 Hz 1380 Hz + 1620 Hz 1140 Hz + 900 Hz Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 297: Mfe Signaling
MFE signaling Digit Forward direction DOD-Tx, DID- backward direction DOD-Rx, DID- 1500 Hz + 1620 Hz 1020 Hz + 900 Hz 1380 Hz + 1740 Hz 1140 Hz + 780 Hz 1500 Hz + 1740 Hz 1020 Hz + 780 Hz 1620 Hz + 1740 Hz 900 Hz + 780 Hz 1380 Hz + 1860 Hz...
Page 298: Sender And Receiver Mode
XMFC sender and receiver specifications Table 137: XMFC sender specifications on page 299 and Table 138: XMFC receiver specifications on page 299 provide the operating requirements for the NT5K21 XMFC/MFE Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 299: Xmfe Sender And Receiver Specifications
Sender and receiver mode card. These specifications conform to CCITT R2 recommendations: Q.441, Q.442, Q.451, Q.454, and Q.455. Table 137: XMFC sender specifications Forward frequencies in DOD mode: 1380, 1500, 1620, 1740, 1860, 1980 Hz Backward frequencies in DOD mode: 1140, 1020, 900, 780, 660, 540 Hz Frequency tolerance: +/- 0.5 Hz from nominal...
Page 300: Physical Specifications
S/N > 18 dB No degradation in-band white noise Physical specifications Table 141: Physical specifications on page 300 outlines the physical specifications of the NT5K21 XMFC/MFE circuit card. Table 141: Physical specifications Dimensions Height: 12.5 in. (320 mm) Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 301 Physical specifications Depth: 10.0 in. (255 mm) Thickness: 7/8 in. (22.25 mm) Faceplate LED Lit when the circuit card is disabled Cabinet Location Must be placed in the main cabinet (Slots 1-10) Power requirements 1.1 Amps typical Environmental considerations Meets the environment of the system Circuit Card Reference July 2011...
Page 302 NT5K21 XMFC/MFE card Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 303: Chapter 16: Nt6D70 Silc Line Card
Chapter 16: NT6D70 SILC Line card Contents This section contains information on the following topics: Introduction on page 303 Physical description on page 304 Functional description on page 305 Introduction The S/T Interface Line card (SILC) (NT6D70AA –48V North America, NT6D70 BA –40 V International) provides eight S/T four-wire full-duplex interfaces to connect ISDN BRI- compatible terminals over Digital Subscriber Loops (DSLs) to the System.
Page 304: Isdn Bri
The NT6D70 SILC is a standard size circuit card designed to be inserted in peripheral equipment slots in the Meridian 1. Its faceplate is equipped with an LED to indicate its status. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 305: Power Consumption
Functional description The NT6D70 SILC Card is a standard-size circuit card designed to be inserted in slots in the Media Gateway and Media Gateway Expansion. Its faceplate is equipped with an LED to indicate its status. Power consumption Power consumption is +5 V at 800 mA and –48 V at 480 mA. Power consumption is +5 V at 800 mA and -48V at 480 mA.
Page 306 ISDN BRI-compatible terminals over DSL to the CS 1000. Each S/T interface provides two B-channels and one D-channel and supports a maximum of eight physical connections that can link up to 20 logical terminals on one DSL. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 307: Micro Controller Unit (Mcu)
Functional description A logical terminal is any terminal that can communicate with the CS 1000over a DSL. It can be directly connected to the DSL through its own physical termination or be indirectly connected through a common physical termination. The length of a DSL depends on the specific terminal configuration and the DSL wire gauge; however, it should not exceed 1 km (3,280 ft).
Page 308: Ipe Interface Logic
The maintenance signaling channel (MSC) interface is used to communicate signaling and card identification information from the Meridian 1 CPU to the SILC MCU. The signaling information also contains maintenance instructions. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 309: S/T Interface Logic
Functional description The digital pad provides gain or attenuation values to condition the level of the digitized transmission signal according to the network loss plan. This sets transmission levels for the B-channel circuit-switched voice calls. The clock recovery circuit recovers the clock from the local exchange. The clock converter converts the 5.12 MHz clock from the IPE backplane into a 2.56 MHz clock to time the IPE bus channels and an 8 kHz clock to provide PCM framing bits.
Page 310 2 watts of power to physical terminations on each DSL. It provides -48 V for ANSI- compliant ISDN BRI terminals and –40 V for CCITT (such as ETSI NET-3, INS NET-64) compliant terminals. The total power used by the terminals on each DSL must not exceed 2 watts. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 311: Chapter 17: Nt6D71 Uilc Line Card
Chapter 17: NT6D71 UILC line card Contents This section contains information on the following topics: Introduction on page 311 Physical description on page 312 Functional description on page 312 Introduction The NT6D71 U Interface Line card (UILC) supports the OSI physical layer (Layer 1) protocol. The UILC is an ANSI-defined standard interface.
Page 312: Physical Description
• provide eight ISDN U interfaces conforming to ANSI standards • support point-to-point DSL terminal connections • provide channel mapping between ISDN BRI format (2B+D) and system bus format • multiplex four D-channels onto one timeslot Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 313: Micro Controller Unit (Mcu)
Functional description • perform activation and deactivation of DSLs • provide loopback control of DSLs Each U interface provides two B-channels and one D-Channel and supports one physical termination. This termination may be to a Network Termination (NT1) or directly to a single U interface terminal.
Page 314: Ipe Interface Logic
IPE bus channels and an 8-kHz clock to provide PCM framing bits. The IPE interface logic consists of a Card-LAN interface, an IPE bus interface, a maintenance signaling channel interface, a digital pad, and a clock converter. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 315: U Interface Logic
Functional description The CardLAN interface is used for routine card maintenance, which includes polling the line cards to find in which card slot the UILC is installed. It also queries the status and identification of the card, and reports the configuration data and firmware version of the card. The IPE bus interface connects one IPE bus loop that has 32 channels operating at 64 kbps and one additional validation and signaling bit.
Page 316 DSL. The U interface supports voice and data terminals, D-channel packet data terminals, and NT1s. A UILC has eight transceivers to support eight DSLs for point-to-point operation. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 317: Chapter 18: Nt6D80 Msdl Card
Chapter 18: NT6D80 MSDL card Contents This section contains information on the following topics: Introduction on page 317 Physical description on page 318 Functional description on page 319 Engineering guidelines on page 324 Installation on page 329 Maintenance on page 335 Replacing MSDL cards on page 341 Symptoms and actions...
Page 318: Physical Description
Switches S9 and S10 are configured to reflect the device number set in LD 17 (DNUM). S10 designates tens, and S9 designates ones. For example, set device number 14 with S10 at 1 and S9 at 4. Figure 88: MSDL component layout Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 319: Functional Description
Functional description Functional description Figure 89: MSDL block diagram on page 320 illustrates the MSDL functional block diagram. The MSDL card is divided into four major functional blocks: • CPU bus interface • Micro Processing Unit (MPU) • Memory • Serial interface Two processing units serve as the foundation for the MSDL operation: the Central Processing Unit (CPU) and the MSDL Micro Processing Unit (MPU).
Page 320: Micro Processing Unit (Mpu)
The MPU, which is based on a Motorola 68020 processor, coordinates and controls data transfer and port addressing, communicating via the CPU bus with the system. Prioritized interrupts tell the MPU which tasks to perform. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 321: Memory
Functional description Memory The MSDL card contains two megabytes of Random Access Memory (RAM) for storing downloaded peripheral software that controls MSDL port operations. The MSDL card includes the shared RAM that is used as a communication interface buffer between the CPU and the MPU.
Page 322: Msdl Operations
The CPU checks to see if downloading is required. 3. After downloading the peripheral software, the system enables the MSDL. 4. MSDL applications (DCH, AML, SDI) may be brought up if appropriately configured. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 323: Data Flow
Functional description Figure 90: MSDL functional block diagram Data flow The MSDL transmit interface, managed by the MSDL handler, sends data from the system to the MSDL. This interface receives packetized data from the system and stores it in the transmit buffer on the MSDL.
Page 324: Engineering Guidelines
16 MSDL cards providing 64 ports. The MSDL card addresses are set using decimal switches located on the card. These switches can select 100 unique card addresses from 0 to 99. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 325: Port Specifications
Engineering guidelines An address conflict may occur between the MSDL and other cards because of truncated address decoding by the other cards. For example, if a DCHI port is set to address 5, it's companion port is set to address 4, which means that none of the MSDL cards can have hexadecimal address numbers 05H, 15H, É75H, nor addresses 04H, 14H, É74H.
Page 326 Table 144: RS-232 interface pin assignments Signal name EIA circuit CCITT circuit Frame Ground (FG) — — Transmit Data (TX) Receive Data (RX) Request to Send (RTS) Clear to Send (CTS) Data Set Ready (DSR) Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 327 Engineering guidelines Signal name EIA circuit CCITT circuit Signal Ground (SG) — — Carrier Detect (CD) Serial Clock Transmit (SCT) Serial Clock Receive (SCR) Local Loopback (LL) Data Terminal Ready (DTR) 108.2 Remote Loopback (RL) Data Rate Selector (DRS) CH/CI 111/112 External Transmit Clock (ETC) Test Mode (TM)
Page 328: Implementation Guidelines
The internal power supply in each module provides DC power for the MSDL and other cards. Power consumption and heat dissipation for the MSDL is listed in Table 147: MSDL power consumption on page 329. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 329: Installation
Installation Table 147: MSDL power consumption Voltage (VAC) Current (Amps) Power (Watts) Heat (BTUs) 3.20 16.00 55.36 0.10 1.20 4.15 –12 0.10 1.20 4.15 Installation Device number Before installing MSDL cards, determine which of the devices in the system are available. If all 16 devices are assigned, remove one or more installed cards to replace them with MSDL cards.
Page 330: Installing The Msdl Card
3. Insert the MSDL card into the selected card slot of the module following the card guides in the module. 4. Slide the MSDL into the module until it engages the backplane connector. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 331: Cable Requirements
Installation 5. Push the MSDL firmly into the connector using the locking devices as levers by pushing them toward the card's front panel. 6. Push the card-locking devices firmly against the front panel of the card so they latch to the front lip in the module and to the post on the card. 7.
Page 332 Table 149: Cable types Function Cable type Cable length NTND26AA 6 feet NTND26AB 18 feet NTND26AC 35 feet NTND26AD 50 feet AML, ISL, SDI NTND27AB 6 feet Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 333: Cable Installation
Installation Cable installation When the MSDL card is installed, connect the cables to the equipment required for the selected operation. PRI trunk connections D-channel operations require connections between the MSDL and a PRI trunk card. Refer to ISDN Primary Rate Interface: Features (NN43001-569) for a complete discussion of PRI and D-channels.
Page 334: Msdl Planning Form
NT6D80AA-110046 Date Last update installed 5/5/93 2/1/93 Ports Operation Logical no. Switch Cable no. Operation information setting RS-232 NTND27A maint TTY 9600 baud RS-422 NTND26A PRI 27 to hdqtrs RS-232 NTND27A Spare RS-232 Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 335: Maintenance
Maintenance Maintenance Routine maintenance consists of enabling and disabling MSDL cards and downloading new versions of peripheral software. These activities are performed by an authorized person such as a system administrator. Troubleshooting the MSDL consists of determining problem types, isolating problem sources, and solving the problem.
Page 336 DIS MSDL x to disable it (step 5 in Figure 93: MSDL states on page 336). Otherwise, the system periodically tries to enable the card, attempting recovery during the midnight routines (step 3 in Figure 93: MSDL states page 336). Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 337: Maintaining The Msdl
Maintenance The system disables the MSDL if the card: • exhibits an overload condition • does not respond to system messages • is removed • resets itself • encounters a fatal error • is frequently system disabled and recovered When an MSDL is system disabled, a substate indicates why the MSDL is disabled. The substates are: •...
Page 338: System Controlled Maintenance
For a complete discussion of these programs, refer to Software Input/Output Reference — Administration (NN43001-611). Note: Enter commands after the dot (.) prompt. Note: The "x" in the commands below represents the DNUM value of the card number. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 339 Maintenance Enabling the MSDL Enter ENL MSDL x to enable the MSDL manually. If the MSDL base code has not been previously downloaded or if the card version is different from the one on the system disk, the software is downloaded and the card is enabled. To force software download and enable the card, enter ENL MSDL x FDL.
Page 340: Manually Isolating And Correcting Faults
339 If self-tests fail, replace the card. If self-tests pass, try to enable the card again, as in step 2. If the card does not enable, note the message output to the TTY and follow the recommended action. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 341: Replacing Msdl Cards
Replacing MSDL cards Replacing MSDL cards After completing MSDL troubleshooting you may determine that one or more MSDL cards are defective. Remove the defective cards and replace them with new ones. Replacing an MSDL card An MSDL card can be removed from and inserted into a system module without turning off the power to the module.
Page 342: System Disabled Actions
Refer to Software Input/Output Reference — Administration (NN43001-611). Verify that the address switches on the MSDL are set correctly. Verify that the card is properly installed in the shelf for at least 5 minutes. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 343 System disabled actions If the problem persists, manually disable the card by entering the DIS MSDL x Follow the steps described in Previously operating MSDL cards on page 340. SYSTEM DISABLED—SELF-TESTING: Table 151: Cause: The MSDL card has reset itself or the system has reset the card to perform self-tests. Self-tests are in progress.
Page 344 340. SYSTEM DISABLED—RESET THRESHOLD: Table 155: Cause: The system detected more than four MSDL card resets within 10 minutes. The system attempts to enable the card again at midnight unless you intervene. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 345 System disabled actions Action: Place the card in the manually disabled state with the DIS MSDL x command and follow the steps in Previously operating MSDL cards on page 340. SYSTEM DISABLED—FATAL ERROR: Cause: The MSDL card encountered a fatal error and cannot recover. The exact reason for the fatal error is shown in the MSDL300 error message output to the console of TTY when the error occurred.
Page 346 NT6D80 MSDL card Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 347: Chapter 19: Nt8D02 And Ntdk16 Digital Line Cards
Chapter 19: NT8D02 and NTDK16 Digital Line cards Contents This section contains information on the following topics: Introduction on page 347 Physical description on page 348 Functional description on page 349 Electrical specifications on page 357 Connector pin assignments on page 358 Configuration on page 359 Introduction...
Page 348: Nt8D02 Digital Line Card
The NTDK16AA has one LED. This LED shows the status of Card 4. The NTDK16BA has three LEDs. These LEDs show the status of Cards 4, 5, and 6 configured on the NTDK16. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 349: Functional Description
Functional description Figure 94: Digital line card - faceplate Functional description NT8D02 Digital Line card The NT8D02 Digital Line card is equipped with 16 identical units. Each unit provides a multiplexed voice, data, and signaling path to and from digital apparatus over a 2-wire full duplex 512 kHz time compression multiplexed (TCM) digital link.
Page 350 Figure 95: Digital line card - block diagram on page 351 shows a block diagram of the major functions contained on the NT8D02 Digital Line card. Each of these functions is described on the following pages. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 351: Ntdk16 Digital Line Card
Functional description Figure 95: Digital line card - block diagram NTDK16 Digital Line card The NTDK16 digital line card is equipped with 48 identical units. Each unit provides a multiplexed voice, data, and signaling path to and from digital apparatus over a 2-wire full duplex 512 kHz time compression multiplexed (TCM) digital link.
Page 352 Figure 97: Digital line card - block diagram on page 354 shows a block diagram of the major functions contained on the digital line card. Each of these functions are described on the following pages. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 353 Functional description Figure 96: NTDK16 DLC Circuit Card Reference July 2011...
Page 354: Card Interfaces
The digital line card passes voice, data, and signaling over DS-30X loops and maintenance data over the card LAN link. These interfaces are discussed in detail in the section Intelligent Peripheral Equipment on page 35. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 355: Digital Line Interfaces
Functional description Digital line interfaces The digital line interface contains two Digital Line Interface Circuits (DLIC). Each digital line interface circuit provides eight identical, individually configurable voice and data interfaces to eight digital telephone lines. These lines carry multiplexed PCM voice, data, and signaling information as TCM loops.
Page 356: Circuit Power
The +15 V DC input is regulated down to +10 V DC for use by the digital line interface circuits. The ±15.0 V DC inputs to the card are used to power the loop interface circuits. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 357: Electrical Specifications
Electrical specifications Electrical specifications This section lists the electrical characteristics of the NT8D02 and NTDK16 digital line cards. Digital line interface specifications Table 157: NT8D02/NTDK16 Digital Line card technical summary on page 357 provides a technical summary of the digital line cards. Table 157: NT8D02/NTDK16 Digital Line card technical summary NT8D02 DLC NTDK16BA DLC...
Page 358: Connector Pin Assignments
Connector pin assignments Table 160: NT8D02 Digital Line card - backplane pinouts on page 359 shows the I/O pin designations at the backplane connector, which is arranged as an 80-row by 2-column array Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 359: Configuration
Configuration of pins. Normally, these pin positions are cabled to 50-pin connectors at the I/O panel in the rear of each module for connection with 25-pair cables to the MDF. The information in Table 160: NT8D02 Digital Line card - backplane pinouts on page 359 is provided as a reference and diagnostic aid at the backplane, because the cabling arrangement can vary at the I/O panel.
Page 360: Jumper And Switch Settings
Administration (NN43001-611) for LD 11 service change instructions. Voice and data ports are configured using the Meridian Digital TelephoneAdministration program LD 11. See Software Input/Output Reference — Administration (NN43001-611) for LD 11 service change instructions. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 361 Configuration Figure 98: Digital line card - jumper block and switch locations Circuit Card Reference July 2011...
Page 362 NT8D02 and NTDK16 Digital Line cards Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 363: Chapter 20: Nt8D09 Analog Message Waiting Line Card
Chapter 20: NT8D09 Analog Message Waiting Line card Contents This section contains information on the following topics: Introduction on page 363 Physical description on page 364 Functional description on page 366 Connector pin assignments on page 373 Configuration on page 375 Introduction The NT8D09 Analog Message Waiting Line card is an IPE line card that can be installed in the NT8D37 IPE module.
Page 364: Physical Description
(see Figure 99: Analog message waiting line card - faceplate on page 365. At power-up, the LED flashes as the analog line card runs a self-test. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 365 Physical description If the test completes successfully, the card is automatically enabled (if it is configured in software) and the LED goes out. Figure 99: Analog message waiting line card - faceplate Circuit Card Reference July 2011...
Page 366: Functional Description
Figure 100: Analog message waiting line card - block diagram on page 367 shows a block diagram of the major functions contained on the analog message waiting line card. Each of these functions are described in the following sections. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 367: Card Interfaces
Functional description Figure 100: Analog message waiting line card - block diagram Card interfaces The analog message waiting line card passes voice and signaling data over DS-30X loops and maintenance data over the card LAN link. These interfaces are discussed in Intelligent Peripheral Equipment on page 35.
Page 368: Line Interface Units
• 40 mA to telephones with short circuit protection. Card control functions Control functions are provided by the following: • a microcontroller • a card LAN interface • signaling and control circuits on the analog message waiting line card Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 369: Circuit Power
Functional description Microcontroller The analog message waiting line card contains a microcontroller that controls the internal operation of the card and the serial card LAN link to the controller card. The microcontroller controls the following: • reporting to the CE CP through the card LAN link: - card identification (card type, vintage, and serial number) - firmware version - self-test status...
Page 370: Technical Summary Or Electrical Specifications
0.5 dB loss for PCM to analog Input impedance The impedance at tip and ring is 600 ohms with a return loss of: • 20 dB for 200-500 Hz • 26 dB for 500-3400 Hz Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 371 Functional description Insertion loss On a station line-to-line connection, the total insertion loss at 1 kHz is 6 dB + 1 dB. This is arranged as 3.5 dB loss for analog to PCM, and 2.5 dB loss for PCM to analog. Frequency response The loss values in Table 163: Analog message waiting line card - frequency response...
Page 372: Power Requirements
In-circuit protection against power line crosses or lightning is not provided on the Analog Message Waiting line card. When the Analog line card is used to service off-premise telephones, the NTAK92 Off-premise protection module must be used. Check local regulations before providing such service. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 373: Overload Level
Connector pin assignments Overload level Signal levels exceeding +7 dBm applied to the tip and ring cause distortion in speech transmission. Environmental specifications Table 166: Analog message waiting line card - environmental specifications on page 373 lists the environmental specifications for the analog message waiting line card. Table 166: Analog message waiting line card - environmental specifications Parameter Specifications...
Page 374 Line 12, Ring Line 12, Tip Line 13, Ring Line 13, Tip Line 14, Ring Line 14, Tip Line 15, Ring Line 15, Tip * These pinouts apply to both NT8D37 and NT8D11 backplanes. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 375: Configuration
Configuration Figure 101: Analog message waiting line card - typical cross connection example Configuration This section outlines the procedures for configuring the switches and jumpers on the NT8D09 Analog Message Waiting Line card and configuring the system software to properly recognize the card.
Page 376: Software Service Changes
Administration (NN43001-611) for LD 97 service change instructions. Table 168: Transmission Profile Changes Vintage A/D convertor gain D/A convertor gain Previous to AK –3.5 dB –2.5 dB AK and later –3.5 dB –0.5 dB Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 377 Configuration Figure 102: Analog message waiting line card - jumper block and switch locations Circuit Card Reference July 2011...
Page 378 NT8D09 Analog Message Waiting Line card Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 379: Chapter 21: Nt8D14 Universal Trunk Card
Chapter 21: NT8D14 Universal Trunk card Contents This section contains information on the following topics: Introduction on page 379 Physical description on page 381 Functional description on page 382 Operation on page 385 Electrical specifications on page 416 Connector pin assignments on page 420 Configuration on page 421...
Page 380 Loop start No (see note) Ground start Loop DR Loop OAID Continuous operation mode Start modes (pulse and level) Note: For incoming and outgoing service, DID trunks must be programmed as loop dial repeating. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 381: Physical Description
Physical description Physical description The trunk and common multiplexing circuitry is mounted on a 31.75 cm by 25.40 cm (12.5 in. by 10 in.) printed circuit board. The NT8D14 Universal Trunk card connects to the backplane through a 160-pin connector shroud.
Page 382: Functional Description
Figure 104: NT8D14 Universal trunk card - block diagram on page 383 shows a block diagram of the major functions contained on the NT8D14 Universal Trunk card. Each of these functions is described on the following pages. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 383: Card Interfaces
Functional description Figure 104: NT8D14 Universal trunk card - block diagram Card interfaces The NT8D14 Universal Trunk card passes voice and signaling data over DS-30X loops, and maintenance data over the card LAN link. Trunk interface units The NT8D14 Universal Trunk card contains eight identical and independently configurable trunk interface units (also referred to as circuits).
Page 384: Card Control Functions
- programming of the codecs - enabling/disabling of individual units or entire card - programming of input/output interface control circuits for administration of trunk interface unit operation - maintenance diagnostics - transmission pad settings Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 385: Signaling Interface
Operation Card LAN interface Maintenance data is exchanged with the common equipment CPU over a dedicated asynchronous serial network called the Card LAN link. Signaling and control The signaling and control portion of the Universal Trunk card works with the CPU to operate the card hardware.
Page 386 CO/FX/WATS on page 386 and Figure 106: Loop start call connection sequence - incoming call from CO/FX/WATS on page 387. Figure 105: Loop start call states - incoming call from CO/FX/WATS Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 387 Operation Figure 106: Loop start call connection sequence - incoming call from CO/FX/WATS Outgoing calls For outgoing calls, the software sends an outgoing seizure message to place a low-resistance loop across the tip and ring leads toward the CO. See Figure 107: Ground start call states - incoming call from CO/FX/WATS on page 388 and...
Page 388 NT8D14 Universal Trunk card Figure 107: Ground start call states - incoming call from CO/FX/WATS Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 389 Operation Figure 108: Ground start call connection sequence - incoming call from CO/FX/WATS Polarity-sensitive/-insensitive packs feature The CS 1000 software provides the polarity-sensitive/polarity-insensitive (PSP and PIP) packs feature for the accurate recording of outgoing call duration for loop start and ground start operation.
Page 390: Ground Start Operation
CO/FX/WATS on page 390 and Figure 110: Ground start call connection sequence - incoming call from CO/FX/WATS on page 391. Figure 109: Ground start call states - incoming call from CO/FX/WATS Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 391 Operation Figure 110: Ground start call connection sequence - incoming call from CO/FX/WATS Reverse-wiring compensation The CS 1000 software includes a feature for detecting reverse wiring (connection of the near- end tip and ring leads to the far-end ring and tip leads) on ground start trunks with far-end answer supervision.
Page 392 The Polarity-Sensitive/Polarity-Insensitive Packs (PSP and PIP) feature must be set to provide for proper outgoing call-duration recording with ground start operation. Refer to the description of loop start operation in this section for a more complete discussion of PSP and PIP. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 393 Operation Figure 111: Ground start call states - outgoing call to CO/FX/WATS Circuit Card Reference July 2011...
Page 394: Direct Inward Dial Operation
Figure 113: DID trunk, loop DR call states - incoming call from CO on page 396 and Figure 114: DID trunk, loop DR call connection sequence - incoming call from CO on page 397. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 395 Operation Dial pulses or DTMF tones are then presented from the CO. When the called party answers, the universal trunk card reverses battery and ground on the tip and ring leads to the CO. The trunk is arranged for first party release. The CO releases the trunk by removing the low- resistance loop, at which time normal battery and ground are restored at the near-end.
Page 396 NT8D14 Universal Trunk card Figure 113: DID trunk, loop DR call states - incoming call from CO Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 397: Two-Way, Loop Dial Repeating, Tie Trunk Operation
Operation Figure 114: DID trunk, loop DR call connection sequence - incoming call from CO Two-way, loop dial repeating, TIE trunk operation Incoming calls In an incoming call configuration, the far-end initiates a call by placing a low-resistance loop across the tip and ring leads. See Figure 115: Two-way, loop DR, TIE trunk call states - incoming call from far-end PBX on page 398 and...
Page 398 Where no near-end answer supervision is provided, the party at the far-end hangs up after recognizing near-end call termination. Figure 115: Two-way, loop DR, TIE trunk call states - incoming call from far-end PBX Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 399 Operation Figure 116: Two-way, loop DR, TIE trunk call connection sequence - incoming call from far-end Note: Where no near-end answer supervision is provided, the party at the far-end hangs up after recognizing near-end call termination. Outgoing calls In an outgoing call configuration, the NT8D14 Universal Trunk card is connected to an existing PBX by a tie trunk.
Page 400 Where no far-end answer supervision is provided, the party at the near-end hangs up, after recognizing far-end call termination. Figure 117: Two-way, loop DR, TIE trunk call states - outgoing call to far-end PBX Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 401 Operation Figure 118: Two-way, loop DR, TIE trunk call connection sequence - outgoing call to far-end PBX Circuit Card Reference July 2011...
Page 402 NT8D14 Universal Trunk card Figure 119: Two-way, loop DR, TIE trunk call states - outgoing call to far-end PBX Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 403: Senderized Operation For Did And Two-Way Loop Dr Trunks
Operation Figure 120: Two-way, loop DR, TIE trunk call connection sequence - outgoing call to far-end PBX Senderized operation for DID and two-way loop DR trunks Incoming calls If the far-end is senderized, the near-end can operate in any mode: Immediate Start (IMM), Delay Dial (DDL) or Wink (WNK) start, as assigned at the STRI prompt in the Trunk Administration program LD 14.
Page 404 Figure 122: Two-way, loop DR, TIE trunk call states - incoming call through senderized, tandem PBX from a CO/FX/WATS trunk on page 406 also applies to incoming calls on a DID trunk from a CO. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 405 Operation Figure 121: Two-way, loop DR, TIE trunk call states - incoming call through senderized, tandem PBX from a CO/FX/WATS trunk Circuit Card Reference July 2011...
Page 406 See Figure 123: Two-way, loop DR, TIE trunk call states - outgoing call through far-end PBX to CO/FX/ WATS on page 407. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 407: Outgoing Automatic, Incoming Dial Operation
Operation Note: Pseudo-answer supervision is provided by near-end at expiration of end-of-dial timer. Where no far-end answer supervision is provided, the party at the far-end hangs up after recognizing near-end call termination. Figure 123: Two-way, loop DR, TIE trunk call states - outgoing call through far-end PBX to CO/ FX/WATS Outgoing automatic, incoming dial operation Incoming calls...
Page 408 This alerts the far-end of the seizure. The far-end responds with a low resistance across the tip and ring leads. Figure 124: Two-way, loop OAID, TIE trunk call states - incoming call from far-end PBX Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 409 Operation Figure 125: Two-way, loop OAID, TIE trunk call connection sequence - incoming call from far- end PBX Circuit Card Reference July 2011...
Page 410 NT8D14 Universal Trunk card Figure 126: Two-way, loop OAID, TIE trunk call states - outgoing call to far-end PBX Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 411: Recorded Announcement Trunk Operation
Operation Figure 127: Two-way, loop OAID, TIE trunk call connection sequence - incoming call from far- end PBX Recorded announcement trunk operation Note: Refer to Multi-Channel RAN modes on page 414 for information about Multi-Channel RAN modes, which are not linked to a RAN machine or a given trunk. When configured for Recorded Announcement (RAN) operation, a trunk unit is connected to a customer-provided recorded announcement machine.
Page 412 Figure 128: Connecting RAN equipment to the NT8D14 Universal Trunk Card (typical) page 413 shows a typical connection from a single announcement machine channel to unit 0 on a universal trunk card. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 413 Operation Figure 128: Connecting RAN equipment to the NT8D14 Universal Trunk Card (typical) RAN modes of operation Figure 129: RAN control signals (Control GRD = IDLE) on page 414 shows the relationship of control signals to message playback for the operating modes available in announcement machines.
Page 414 Multi-Channel RAN modes In Multi-Channel RAN, multiple RAN channels can be configured within one RAN trunk route. In a Multi-Channel RAN route, each trunk has its own dedicated RAN channel on a physical Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 415 Operation RAN machine. Multi-Channel RAN routes do not support the cross connecting (daisy chains) of multiple trunk ports together so that several callers hear the same RAN message. Multi-channel machine types - Continuous Mode Multi-Channel (MCON), Pulse Start/Stop Multi-Channel (MPUL) and Level Start/Stop Multi-Channel (MLVL) – are not linked to a RAN machine or a given trunk.
Page 416: Electrical Specifications
Refer to Software Input/Output Reference — Administration (NN43001-611) for instructions on service change programs. Electrical specifications Table 170: Universal trunk card - trunk interface electrical characteristics on page 417 gives the electrical characteristics of the NT8D14 Universal Trunk card. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 417 Electrical specifications Table 170: Universal trunk card - trunk interface electrical characteristics Trunk Types Characteristic CO / FX / WATS DID / TIE Paging Terminal impedance 600 or 900 ohms 600 or 900 ohms 600/900 ohms 600 ohms (Note 1) (Note 1) (Note 1) Balance impedance...
Page 418: Power Requirements
The NT8D14 Universal Trunk card meets UL-1489 and CS03 over-voltage (power cross) specifications and FCC Part 68 requirements. Environmental specifications Table 172: Environmental specifications for the NT8D14 Universal Trunk card on page 419 lists the environmental specifications for the NT8D14 Universal Trunk card. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 419: Release Control
Electrical specifications Table 172: Environmental specifications for the NT8D14 Universal Trunk card Parameter Specifications Operating temperature 0¡ to +60¡ C (+32 to +140¡ F), ambient 0 to 50 degrees C, ambient (Small Systems and CS 1000E) Operating humidity 5 to 95% RH (non-condensing) Storage temperature –40¡...
Page 420: Connector Pin Assignments
Table 174: Universal trunk card - backplane pinouts Trunk Back- Signal Back- Signal Number plane plane Paging Other Paging Other mode mode modes mode mode modes Ring Ring Ring Ring Ring Ring Ring Ring Ring Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 421: Configuration
Configuration Trunk Back- Signal Back- Signal Number plane plane Paging Other Paging Other mode mode modes mode mode modes Ring Ring Ring Ring Ring Ring Ring Ring Ring Ring Ring Ring Ring Ring Ring Configuration The trunk type for each unit on the card as well as its terminating impedance and balance network configuration is selected by software service change entries at the system terminal and by jumper strap settings on the card.
Page 422 Note: Jumper strap settings J1.X, J2.X, J3.X, and J4.X apply to all eight units; "X" indicates the unit number, 0–7. "Off" indicates that no jumper strap is installed on a jumper block. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 423 Configuration Trunk types Loop length Jumper strap settings (Note 1) J1.X J2.X J3.X J4.X (Note 2) Note: For the NT8D14BB card, J4.X is not provided on the board. The J4.X jumper setting specified in Table 176: Jumper strap settings - extended range (NT8D14BA, NT8D14BB, NT8D14BB) on page 422 does not apply.
Page 424: Jumper Strap Settings
Figure 130: Universal trunk card - jumper locations for NT8D14BA and NT8D14BB Release 9 and below on page 425 shows jumper locations on the universal trunk card (vintage BA). Note: Refer to Circuit Card Reference (NN43001-311) for vintage AA jumper strap settings. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 425: Service Change Entries
Configuration Figure 130: Universal trunk card - jumper locations for NT8D14BA and NT8D14BB Release 9 and below Service change entries The trunk type, terminating impedance, and balance network are selected by making service change entries in the Trunk Administration program LD 14. Table 178: Trunk types - termination impedance and balance network (NT8D14BA, NT8D14BB) on page 426 for the proper values for the trunk type and loop length.
Page 426 22 AWG 24 AWG 26 AWG 22 AWG 24 AWG 26 AWG 915 m (3000 ft.) 1524 m (5000 ft.) 2225 m (7300 ft.) 3566 m (11700 ft.) 5639 m (18500 ft.) 1544 Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 427: Port-To-Port Loss Configuration
Configuration Figure 131: Universal trunk card - jumper locations for NT8D14BB Release 10 and higher Port-to-port loss configuration Loss parameters are selected on the NT8D14 Universal Trunk card by a switchable pad controlled by codec emulation software. For convenience, the pads settings are called "in" and Circuit Card Reference July 2011...
Page 428 Transmit and receive designations are from and to the system. Transmit is from the system to the external facility (digital-to-analog direction in the Universal trunk card). Receive is to the system from the external facility (analog-to-digital direction in the Universal trunk card). Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 429: Applications
Applications Port B Port B pads Universal Trunk Port-to-port loss (dB) Pads Transmit Receive Transmit Receive Port B to Universal D to A A to D D to A A to D Universal trunk trunk card to card Port B Note: When Port B is the call originating port.
Page 430: Music Operation
If the music source is equipped with contacts that close when music is online, use these contacts to provide a ground to the MB line; otherwise, ground the MB line at the MDF. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 431: Chapter 22: Nt8D15 E And M Trunk Card
Chapter 22: NT8D15 E and M Trunk card Contents This section contains information on the following topics: Introduction on page 431 Physical description on page 432 Functional description on page 434 Operation on page 441 Electrical specifications on page 450 Connector pin assignments on page 452 Configuration...
Page 432: Physical Description
80-pin connector at the rear of the pack. Each trunk circuit on the card connects to trunk facilities by tip and ring leads which carry voice, ringing, tone signaling and battery. Trunk option selection is determined by software control in LD 14. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 433 Physical description Figure 133: E and M Trunk card - faceplate on page 433 illustrates the faceplate of the E and M Trunk card. The words "Dict Trk" appear on the faceplate label because earlier versions of this card provided dictation trunk connections for third-party equipment. The faceplate of the card is equipped with a red LED.
Page 434: Functional Description
434 shows a block diagram of the major functions contained on the E and M Trunk card. Each of these functions is discussed on the following pages. Figure 134: E and M Trunk card - block diagram Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 435: Common Features
Functional description Common features The following features are common to all circuits on the NT8D15 E and M Trunk card: • Analog-to-digital and digital-to-analog conversion of transmission signals. • Interfaces each of the four PCM signals to one DS30X timeslot in A10 format. •...
Page 436: Trunk Circuit Features
- voice transmission and reception through two separate paths - Type I signaling through E and M leads - Type II signaling with near-end seizure by SB/M leads and far-end detection by E/ SG lead Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 437 Functional description • 4-wire, DX signaling (see Figure 137: 4-wire DX signaling on page 438) • paging trunk operation (see Figure 138: Paging trunk operation on page 439) with support access by low-resistance path at the PG/A1 leads Note: Paging end-to-end signaling is not supported. Figure 135: E and M Type I signaling Figure 136: E and M Type II signaling Circuit Card Reference...
Page 438 NT8D15 E and M Trunk card Figure 137: 4-wire DX signaling Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 439: Card Control Functions
Functional description Figure 138: Paging trunk operation Card control functions Control functions are provided by a microcontroller, a card LAN, and signaling and control circuits on the E and M Trunk card. Microcontroller The E and M Trunk card contains a microcontroller that controls the internal operation of the card.
Page 440: Signaling Interface
• provide an interface between the card and the system CPU - transmit PCM signals from each of the four units to one DS-30X timeslot in A10 format (ready to send/clear to send—flow control, handshake format) Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 441: Maintenance Features
Operation - transmit and receive signaling messages over a DS-30X signaling channel in A10 format • decode received messages to set configuration and activate/deactivate interface relays for PCM loopback diagnostic purposes • decode outpulsing messages (one per digit) from the CPU to drive outpulsing relays at 20 pps, 10 pps1 (primary), or 10 pps2 (secondary) •...
Page 442 CO trunk (not applicable to CCSA). Idle state For E and M signaling, in the idle state the M lead is ground and the E lead is an open circuit. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 443 Operation Outgoing calls Outgoing calls are processed as follows: The M lead changes from ground to battery. If answer supervision is provided by the far end, there is a change from open to ground on the E lead (ground detection). Figure 140: E and M Type I signaling patterns - originating party release Circuit Card Reference July 2011...
Page 444 445. - In immediate start mode, there is no start signal from the called office. The seizure signal (off hook supervisory state) from the far-end should be at least 150 ms. At the Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 445 Operation end of the seizure signal, the far-end can start pulsing after the standard delay (normally 70 ms minimum). - In delay dial mode, a 256-384 ms off hook/on hook signal is returned to the far-end immediately after receipt of the seizure signal. When the far-end detects the on hook signal (start signal), the far-end can start pulsing after the standard delay (normally 70 ms minimum).
Page 446 NT8D15 E and M Trunk card Figure 142: E and M Type II signaling patterns - originating party release Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 447 Operation Figure 143: E and M Type II signaling patterns - originating party release on a tandem connection Release control Release control of a call made over a trunk is specified in LD 16. Disconnect supervision is specified for each trunk group independently. The two options available are EITHER or ORIGINATING party control.
Page 448 Table 184: DX signaling - incoming calls with originating party release Condition Current in signaling State of trunk lead detector Idle No current flow High Seizure (dial tone to far-end: near-end ready Current flow for digits) Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 449 Operation Condition Current in signaling State of trunk lead detector Digits Current flow Low-high-low for interrupted for each each pulse pulse Near-end answers No current flow Far-end on hook first Current flow High Network taken down and trunk idled No current flow High Near-end on hook first, network taken down Current flow Far-end on hook, trunk idled...
Page 450: Electrical Specifications
Table 187: Electrical characteristics of E and M Trunk cards Characteristic 4-wire trunk 2-wire trunk Signaling range Type I 150 ohms Type I 150 ohms Type II 300 ohms loop Signaling type Type I, Type II Type I Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 451: Power Requirements
Electrical specifications Characteristic 4-wire trunk 2-wire trunk Far-end battery –42 to –52.5 V dc –42 to –52.5 V dc Near-end battery –42.75 to –52.5 V dc –42.75 to –52.5 V dc Ground potential difference ±10 V dc ±10 V dc Line leakage between E lead Š20K¾...
Page 452: Environmental Specifications
454. A list of the connections to the E and M Trunk card in the various 2-wire modes is shown in Table 191: E and M Trunk card - backplane pinouts for 2- Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 453 Connector pin assignments wire modes on page 453. A list of the connections to the E and M Trunk card in the various 4-wire modes is shown in Table 192: E and M Trunk card - backplane pinouts for 4-wire modes on page 453.
Page 454 NT8D15 E and M Trunk card 4-wire Type I Mode 4-wire Type II Mode Trunk Number Signal Signal Signal Signal ESCG Figure 144: E and M Trunk card - typical cross connection example Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 455: Configuration
Configuration Configuration Each of the four trunk circuits on the E and M Trunk card can be individually configured for trunk type, companding mode, and port-to-port loss compensation. Configuring the card requires both jumper changes and configuration software service entries. The locations of the jumpers are shown in Figure 145: E and M Trunk card - jumper locations...
Page 456 Mode of operation (Note 2) (Note 1) 2-wire trunk 4-wire trunk Type I Paging Type I Type II DX tip & ring pair M—rcv E E—rcv M —xmt —xmt J1.X Pins 1–2 Pins 2–3 J2.X On (Note Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 457: Software Service Entries
Configuration Jumper Mode of operation (Note 2) (Note 1) 2-wire trunk 4-wire trunk Type I Paging Type I Type II DX tip & ring pair M—rcv E E—rcv M —xmt —xmt J3.X (Note 4) (Note 4) J4.X Pins 2–3 Pins 1–2 J5.X (Note 4) (Note 4)
Page 458 Transmit Receive A Transmit Receive A Port B to E E and M to D to A to D D to A to D and M Port B IPE line Universal trunk (TRC) Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 459: Applications
Applications Port B Port B pads E and M Trunk Pads Port-to-port loss (dB) Transmit Receive A Transmit Receive A Port B to E E and M to D to A to D D to A to D and M Port B IPE TIE (VNL)
Page 460: Paging Trunk Operation
PG and A. See Figure 147: Paging trunk operation on page 461. In a typical application, this transfers the input of the paging amplifier system to the transmission path of the trunk. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 461 Applications Figure 147: Paging trunk operation Circuit Card Reference July 2011...
Page 462 NT8D15 E and M Trunk card Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 463: Chapter 23: Nt8D41Ba Quad Serial Data Interface Paddle Board
Chapter 23: NT8D41BA Quad Serial Data Interface Paddle Board Contents This section contains information on the following topics: Introduction on page 463 Physical description on page 464 Functional description on page 464 Connector pin assignments on page 466 Configuring the QSDI paddle board on page 467 Applications on page 471...
Page 464: Physical Description
The QSDI paddle board design contains four Universal Asynchronous Receiver/Transmitters (UARTs) and the logic necessary to connect the UARTs to the system processor bus. See Figure 149: NT8D41BA QSDI paddle board block diagram on page 466. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 465 Functional description Figure 148: NT8D41BA QSDI paddle board Other logic on the card includes baud rate generators, RS-232-C driver/receiver pairs, and the switches and logic needed to configure each UART. Circuit Card Reference July 2011...
Page 466: System Considerations
The pinouts for each port are identical to those for each of the other three ports. Table 196: Connectors J1, J2, J3, and J4 pin assignments on page 467 shows the pin assignment that applies to each connector. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 467: Configuring The Qsdi Paddle Board
Configuring the QSDI paddle board Table 196: Connectors J1, J2, J3, and J4 pin assignments Pin # Signal Purpose in DTE mode Purpose in DCE mode Data Carrier detect (Note 1) Data Carrier detect (Not used) Transmitted data Received data Received data Transmitted data Data terminal ready...
Page 468: Option Switch Settings
2,400 38.40 4,800 76.80 9,600 153.60 19,200* 307.20 * For future use. Table 198: NT8D41BA address switch settings SW15 Port 1 Port 2 Switch settings SW16 Port 3 Port 4 Device pair addresses Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 469 Configuring the QSDI paddle board SW15 Port 1 Port 2 Switch settings SW16 Port 3 Port 4 * To enable ports 1 and 2, set SW15 position 1 to ON. To enable ports 3 and 4, set SW16 position 1 to ON. For each X, the setting for this switch makes no difference, because it is not used.
Page 470: Software Service Changes
470 These parameters must be set for each port if both ports are being used. Table 201: LD 17 - Prompts to configure the NT8D841Ba paddle board. Prompt Response Description REQ: Change configuration TYPE: ADAN Configuration type Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 471: Applications
Applications Prompt Response Description ADAN NEW TTY x Define a new system terminal (printer) port as device x, NEW PRT x where x = 0 to 15. CTYPE SDI4 Quad port card XQSDI Quad density QSDI paddle board. USER Enter the user of port x. The values that can be entered depend on the software being used.
Page 472 The QSDI paddle board is compatible with all existing system software, but can only be used with the Meridian 1 system options listed above. It does not support the 110 baud rate or the 20 mA current loop interface. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 473: Physical Description
Physical description Physical description The NT8D41BA Quad Serial Data Interface paddle board is a printed circuit board measuring 31.12 by 12.7 cm (12.25 by 5.0 in.). See Figure 151: NT8D41BA QSDI paddle board page 474. The QSDI paddle board can be used in a system backplane for a total of four serial ports. Up to 12 other serial ports can be added by plugging standard serial cards into standard system slots.
Page 474: Functional Description
The QSDI paddle board design contains four Universal Asynchronous Receiver/Transmitters (UARTs) and the logic necessary to connect the UARTs to the system processor bus. See Figure 152: NT8D41BA QSDI paddle board block diagram on page 475. Other logic on the Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 475: System Considerations
Functional description card includes baud rate generators, RS-232-C driver/receiver pairs, and the switches and logic needed to configure each UART. Figure 152: NT8D41BA QSDI paddle board block diagram System considerations In dual-processor Meridian 1 systems, the QSDI paddle board behaves differently depending on which backplane socket it is installed.
Page 476: Connector Pin Assignments
In DCE mode the signals DTR and RTS are tied to +12 volts to signify that the port on the QSDI paddle board is always ready to transmit and receive data. This mode is set to connect to a modem device (DCE). Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 477: Configuring The Qsdi Paddle Board
Configuring the QSDI paddle board Configuring the QSDI paddle board Configuring the QSDI paddle board to work in a Meridian 1 system consists of setting these option switches for each serial port: • Baud rate • Port address • DTE/DCE mode The QSDI paddle board has fourteen option switches, SW2–13, SW15-16.
Page 478 DCE (modem) off off off on off on on off on off on off NT1P61 (Fiber) on on on on on off on on on off on off Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 479: Software Service Changes
Applications Mode Port 1 — SW 3 Port 1 —SW 2 Port 2 — SW 5 Port 2 — SW4 DTE (terminal) on on on off on off off on off on off on DCE (modem) off off off on off on on off on off on off NT1P61 (Fiber) on on on on on off on on on off on off Port 3 —...
Page 480 DB-9 connector to a peripheral that uses a RS-232-C standard DB-25 connector. See Figure 150: NT8D41BA QSDI paddle board cabling page 472. Figure 153: NT8D41BA QSDI paddle board cabling Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 481: Chapter 24: Ntag26 Xmfr Card
Chapter 24: NTAG26 XMFR card Contents This section contains information on the following topics: Introduction on page 481 MF signaling on page 481 Introduction The XMFR (Extended Multi-frequency receiver) card is used to receive MF digit information. Connections are made between a PBX and a central office. The XMFR card can only operate in systems using µ-law companding.
Page 482: Xmfr Receiver Specifications
< 10 ms Signal Interruption Bridge: must ignore: < 10 ms Time Shift between 2 frequencies: must accept: < 4 ms (Envelop for start/stop) Coincidence between 2 must reject: < 10 ms frequencies: Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 483: Physical Specifications
MF signaling Intersignal Pause: must accept: > 25 ms Maximum Dialling Speed: must accept: 10 signals per second Noise Rejection: Error Rate in Better than: < 1/2500 calls Test: 10 digit calls nominal White Noise frequency @ -23 dBmO ON/OFF = 50 ms/50ms KP duration 100 ms SNR = -20 dB all digits Immunity to Impulse Noise Better than: <...
Page 484 NTAG26 XMFR card Environmental Meets the environment of Meridian 1 systems considerations Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 485: Chapter 25: Ntak02 Sdi/Dch Card
Chapter 25: NTAK02 SDI/DCH card Contents This section contains information on the following topics: Introduction on page 485 NTAK02 SDI/DCH card on page 485 Introduction The NTAK02 Serial Data Interface/D-channel (SDI/DCH) digital trunk card is supported in the Media Gateway only for the ISDN Signaling Link (ISL) D-channel. You can install this card in slots 1 through 4 in the Media Gateway.
Page 486: Connecting To The Ports
• the NE-A25-B cable. Terminate the NE-A25-B cable at the cross connect terminal. Tables Table 212: NTAK02 pinouts - Port 0 at the cross-connect terminal on page 487 through Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 487 NTAK02 SDI/DCH card Table 215: NTAK02 connections at the cross-connect terminal - Port 3 on page 488 give the pinouts for the SDI/DCH card. Table 212: NTAK02 pinouts - Port 0 at the cross-connect terminal RS232 Cable Signal Designations I=Input O=Output Pair Color 1T1R...
Page 488 Color 17T1 Y-OO-Y SCTE SCTA— O— I— O— I— SCT— SCT— A— 18T1 Y-GG-Y SCTE SCTBDC —— —— —DCD BDTR CIDTR 19T1 Y-BRBR- DSRD DSRD CIDTR CIDTR 20T2 Y-SS-Y RTSC CTSRTS RTSC CTSR Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 489: Characteristics Of The Low Speed Port
NTAK02 SDI/DCH card RS422 RS232 Cable Signal Designations Designations Signal I=Input I=Input O=Output O=Output Pair Color 21T2 V-BLBL- SCRA SCTEAR SCRS SCT— SCTA 22T2 V-OO-V SCRB SCTEBR —— —— —— —— SCTB 23T2 V-GG-V RXDA TXDARX RXDT TXDR TXDA 24T2 RXDB TXDBRX ——...
Page 490 NTAK02 SDI/DCH card • Clock: Internal or external • Interface: RS-232-D, RS-422-A Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 491: Chapter 26: Ntak09 1.5 Mb Dti/Pri Card
Chapter 26: NTAK09 1.5 Mb DTI/PRI card Contents This section contains information on the following topics: Introduction on page 491 Physical description on page 492 Functional description on page 495 Architecture on page 495 Introduction The NTAK09 1.5 Mb DTI/PRI digital trunk card is a standard-size IPE circuit card. The NTAK09 provides 1.5Mb ISDN primary rate interface and digital trunk interface capability.
Page 492: Physical Description
Table 216: NTAK09 LED states on page 492. Table 216: NTAK09 LED states State Definition On (Red) The NTAK09 circuit card is disabled. The NTAK09 is not in a disabled state. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 493: Ntak09 Dti/Pri Power On Self-Test
Physical description State Definition On (Green) The NTAK09 circuit card is in an active state. No alarm states exist, the card is not disabled, nor is it in a loopback state. An alarm state or loopback state exists, or the card is disabled. See the other faceplate LEDs for more information.
Page 494: Ntak93 Self-Test
T1 facility environment (a campus, for example), the NTAK92 protection assembly can be used. The NTAK09 circuit card conforms to safety and performance standards for foreign and surge voltage protection in an internal environment. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 495: Functional Description
Functional description Functional description NTAK09 provides the following features and functions: • configurable parameters, including A-Law and µ-Law operation, digital pads on a per channel basis, and Superframe or Extended Superframe formats • AMI or B8ZS line coding • 1.5 Mb Clock recovery and distribution of reference clocks •...
Page 496: Microprocessor
218: Digital pad values and offset allocations on page 496. Table 218: Digital pad values and offset allocations Offset PAD set 0 PAD set 1 –7db –8db –9db –10db 0.6db 6.1dB –1dB 10db Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 497: D-Channel Interface
Architecture Offset PAD set 0 PAD set 1 –3dB 11db –4dB 12db idle code, 7F unassigned code, FF 14db spare –2dB spare –5db spare –6db spare D-channel interface The D-channel interface is a 64 Kbps maximum, full-duplex, serial bit-stream configured as a DCE device.
Page 498: Clock Controller Interface
Clock controller interface The clock controller interface provides the recovered clock from the external digital facility to the clock controller daughterboard through the backplane. Depending on the equipped state Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 499: Clock Rate Converter
Architecture of the clock controller, the clock controller interface enables or disables the appropriate reference clock source, in conjunction with software. Important: Each Media Gateway that has a digital trunk must have a clock controller clocked to an external reference clock. Note: Clocking slips can occur between systems that are clocked from different Central Offices (COs), if the COs are not synchronized.
Page 500 NTAK09 1.5 Mb DTI/PRI card Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 501: Chapter 27: Ntak10 2.0 Mb Dti Card
Chapter 27: NTAK10 2.0 Mb DTI card Contents This section contains information on the following topics: Introduction on page 501 Physical description on page 502 Functional description on page 503 Architecture on page 504 Introduction The NTAK10 2.0 Mb DTI card is a digital trunk card that provides an IPE-compatible 2.0 Mb DTI interface.
Page 502: Physical Description
The clock controller is switched on and locking onto the primary (Green) reference. The clock controller is switched off. Note: Clock controller interface on page 507 in this chapter for more on tracking and free-run operation. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 503: Power Requirements
Functional description Power requirements The 2MB DTI obtains its power from the backplane. It draws less than 2 A on +5 V, 50 mA on +15 V and 50 mA on –15 V. Environment The NTAK10 card meets all applicable Nortel operating specifications. Functional description The NTAK10 provides the following features and functions: •...
Page 504: Applicability To France
8-bit parallel bytes. The signaling bits are extracted by the signaling interface circuitry. Digital Pad: The parallel data is presented to the pad PROM. The PROM contains pad values, idle code, and A/µ-law conversion. They can be set independently for incoming and outgoing Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 505 Architecture voice on a per channel basis. Four conversion formats are provided: A-law to A-law, A-law to µ-law, µ-law to A-law, µ-law to µ-law. Each of these four formats has up to 32 unique pad values. The NTAK10 card provides the pad values of -10, -9, -8, -7, -6,-5, -4, -3, -2, -1, 0, 0.6, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, and 14 dB (also idle and unassigned code).
Page 506: Signaling Interface
Incoming signal Functions of the NTAK10 with regard to incoming signaling include: • recognizing valid changes • determining which channels made the changes • collecting PPM • reporting changes to software Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 507: Clock Controller Interface
Architecture Outgoing supervisory signals The desired ABCD bit pattern for a channel is output by the NTAK10, under the control of the system controller card. The bit pattern to be transmitted is held on the line for a minimum period of time.
Page 508: Clocking Modes
This mode can be used when the , Cabinet systemare used as a master clock source for other systems in the network. Free-run mode is undesirable if the CS 1000E, Cabinet systemare intended to be a slave. It can occur, however, when both the primary Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 509 Architecture and secondary clock sources are lost due to hardware faults or when invoked by using software commands. Clock controller functions and features The NTAK10 2MB DTI clock controller functions and features include: • phase-locking to a reference, generating the 10.24 Mhz system clock, and distributing it to the CPU through the backplane.
Page 510: Switch Settings
510. Table 223: 2 MB DTI switch options Switch Off (Switch Open) On (Switch Closed) S1-1 — — S1-2 CC Enabled CC Disabled S2-1 120 ohms Not Applicable S2-2 Not Applicable Not Applicable Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 511 Architecture Switch Off (Switch Open) On (Switch Closed) S3-1 non-French Firmware French Firmware S3-2 — — Note: The ON position for all the switches is toward the bottom of the card. This is indicated by a white dot printed on the board next to the bottom left corner of each individual switch. Circuit Card Reference July 2011...
Page 512 NTAK10 2.0 Mb DTI card Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 513: Chapter 28: Ntak20 Clock Controller Daughterboard
Chapter 28: NTAK20 Clock Controller daughterboard Contents This section contains information on the following topics: Introduction on page 513 Physical description on page 515 Functional description on page 516 Introduction Digital trunking requires synchronized clocking so that a shift in one clock source results in an equivalent shift in all parts of the network.
Page 514: Clocking Modes
When operating in tracking mode, one DTI/PRI card is defined as the Primary Reference Source (PREF) for clock synchronization. The other DTI/PRI card is defined as the Secondary Reference Source (SREF). PREF and SREF are defined in LD Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 515: Free-Run (Non-Tracking)
Physical description There are two stages to clock controller tracking: • tracking a reference • locking on to a reference When tracking a reference, the clock controller uses an algorithm to match its frequency to the frequency of the incoming clock. When the frequencies are almost matched, the clock controller locks on to the reference.
Page 516: Functional Description
This circuit, under firmware control, enables a phase difference measurement to be taken between the reference entering the PLL and the system clock. The phase difference is used for making frequency measurements and evaluating input jitter and PLL performance. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 517: Digital Phase Lock Loops
Functional description Digital phase lock loops The main digital PLL enables the clock controller to provide a system clock to the CPU. This clock is both phase and frequency locked to a known incoming reference. The hardware has a locking range of + 4.6 ppm for Stratum 3 and + 50 ppm for Stratum 4 (CCITT).
Page 518: Digital To Analog Converter
10 seconds is implemented. Digital to analog converter The Digital to Analog Converter (DAC) enables the microprocessor to track, hold, and modify the error signal generated in the digital PLL. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 519: Cpu-Mux Bus Interface
Functional description The firmware uses the available memory on the clock controller to provide error-burst detection and correction. Temporary holdover occurs in the momentary absence of the reference clock. Holdover and free-run In the temporary absence of a synchronization reference signal, or when sudden changes occur on the incoming reference due to error bursts, the clock controller provides a stable holdover.
Page 520: External Timing Interface
FCC part 15 sub- part J CSA C108.8 CISPR publication 22 IEC 801-2 Temperature IEC 68-2-1 IEC 68-2-2 IEC 68-2-14 Humidity IEC 68-2-3 Vibration/Shock IEC 68-2-6 IEC 68-2-7 IEC 68-2-29 IEC 68-2-31 IEC 68-2-32 Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 521: Chapter 29: Ntak79 2.0 Mb Pri Card
Chapter 29: NTAK79 2.0 Mb PRI card Contents This section contains information on the following topics: Introduction on page 521 Physical description on page 522 Functional description on page 526 Architecture on page 526 Introduction The NTAK79 2.0 Mb Primary Rate Interface (PRI) card provides a 2.0 Mb interface and an onboard D-channel handler (DCH).
Page 522: Physical Description
The clock controller is switched on and is either locked to a reference or in free run mode. Flashing (Green) The clock controller is switched on and attempting to lock on to a reference (tracking mode). If the LED Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 523: Ntak79 Switches
Physical description State Definition flashes continuously over an extended period of time, check the CC STAT in LD 60. If the CC is tracking this can be an acceptable state. Check for slips and related clock controller error conditions. If none exist, then this state is acceptable, and the flashing is identifying jitter on the reference.
Page 524 SW 1-1 enable DCHI disable DCHI SW 1-2 DPNSS1/DASS2 Q.931 Switch SW2 - Carrier Impedance Configuration This switch sets the carrier impedance to 120 ohms. Twisted pair cable is usually associated with 120 ohms. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 525: Power Requirements
Physical description Table 228: Switch SW2 Cable Type SW 2-1 SW 2-2 120 ohms Up (Off) Down (On) Switch SW3 - Clock Controller Configuration This switch enables/disables (H/W) the on-board Clock Controller. Disable the SW 3-2 if the on-board clock controller is not in use. Table 229: Switch SW3 Switch Down (On)
Page 526: Functional Description
• DS-30X interface • A07 signaling interface • digital pad • carrier interface • CEPT transceiver • SLIP control • D-channel support interface • 8031 microcontroller • Card-LAN / echo / test port interface Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 527: Ds-30X Interface
Architecture DS-30X interface The NTAK79 interfaces to one DS-30X bus which contains 32 byte-interleaved timeslots operating at 2.56 Mb. Each timeslot contains 10 bits in A10 message format; eight are assigned to voice/data (64 kbps), one to signaling (8 kbps), and one is a data valid bit (8 kbps). The incoming serial bit stream is converted to 8-bit parallel bytes to be directed to padding control.
Page 528: Signaling Interface
Carrier grounding The NTAK79 card provides the capability of selectively grounding the shield of the Tx and/or Rx pairs of the carrier. Closing (down) the on-board switch applies FGND to the appropriate Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 529: Cept Transceiver
Architecture carrier cable shield. The switch settings are shown in Table 233: Carrier shield grounding switch settings on page 529. The switch should be kept in ”ON” position. Table 233: Carrier shield grounding switch settings Switch Carrier Pair S4-1 Rx shield Open S4-2 Tx shield...
Page 530: Slip Control
MDF connector. Connections are made to these pins for normal on-board DCHI operation. They can also be used for future or special applications. The signals conform to the EIA RS-422 standard. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 531: Card-Lan Interface
Architecture Card-LAN interface A Dual Port UART handles the functions of the serial ports for the Card-LAN serial link and the echo canceller/test port interface. The echo/test interface is an asynchronous 4800 bps 8-bit connected to port A of the UART. The Card-LAN interface is an asynchronous 19.2 kbps 9 bit start/stop connected to port B of the UART.
Page 532 On failure (both out of specification), the clock controller enters the HOLDOVER mode and continuously monitors both references. An automatic switchover is initiated to the reference that recovers first. If the secondary recovers first, then Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 533 Architecture the clock controller tracks to the secondary, but switches over to the primary when the primary recovers. If the primary recovers first, the clock controller tracks to the primary. If the software command "track to secondary" is given, the clock controller tracks to the secondary reference and continuously monitors the quality of both primary and secondary references.
Page 534 NTAK79 2.0 Mb PRI card Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 535: Contents
Chapter 30: NTDW79AAE5 Universal Digital Trunk card Contents This section contains information on the following topics: Introduction on page 535 Physical description on page 539 Functional description on page 541 Introduction The NTDW79AAE5 Universal Digital Trunk (UDT) card is a single slot size TDM card. The NTDW12AAE5 Universal Clock Controller (UDT CC) daughter board may be mounted on the UDT card.
Page 536 Figure 156: UDT card positioning in CS 1000M Cabinet/ Meridian 1 PBX 11C Cabinet Figure 157: UDT card positioning in CS 1000M Chassis/ Meridian 1 PBX 11C Chassis page 537 shows the UDT card positioning in the CS 1000M chassis / Meridian1 PBX 11C chassis. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 537 Introduction Figure 157: UDT card positioning in CS 1000M Chassis/ Meridian 1 PBX 11C Chassis Figure 158: UDT card positioning in a CS 1000E system on page 538 shows the UDT card positioning in a CS 1000E system. Circuit Card Reference July 2011...
Page 538 Figure 158: UDT card positioning in a CS 1000E system Figure 159: UDT card positioning in a CS 1000B system on page 539 shows the UDT card positioning in a CS 1000B system. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 539: Physical Description
Physical description Figure 159: UDT card positioning in a CS 1000B system The UDT card is based on the technology of the MG 1000E PRI Gateway, with the following main features: • DTI, DTI2, PRI, PRI2, DPNSS, DASS2 • Optional UDT CC daughter board •...
Page 540: Power Requirements
Table 235: UDT card LED functionality Group LED name Color Functionality E1/T1 span (3 LEDs) EN/DIS green E1/T1 link is enabled E1/T1 link is disabled No Alarm/Loop disabled E1/T1 Link has Near End Alarm No Alarm/Loop disabled Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 541: Functional Description
Functional description Group LED name Color Functionality yellow E1/T1 Link has Far End Alarm D-Channel (1 LED) DCH is not configured in UDT MSDL/DDSL is disabled green MSDL/DDSL is enabled Clock Sync (1 LED) UDT CC is not equipped Clock Controller disabled/not configured green Enabled and locked to a...
Page 542: Clock Reference
• Other digital trunk cards can be used as the Secondary clock reference for the UDT CC daughter board. • The UDT CC daughter board and the NTAK20 CC daughter board can be used in different cabinets within the same system. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 543: Contents
Chapter 31: NTAK93 D-channel Handler Interface daughterboard Contents This section contains information about the following topics: Introduction on page 543 Physical description on page 544 Functional description on page 544 Introduction The NTAK93 provides the D-channel handler interfaces required by the ISDN PRI trunk. The DCHI performs D-channel Layer 2 message processing and transfers Layer 3 signaling information between two adjacent network switches.
Page 544: Chapter 31: Ntak93 D-Channel Handler Interface Daughterboard
Power consumption Power consumption is +5 V at 750 mA; +12 V at 5 mA; and –12 V at 5 mA. Functional description The main functional blocks of the NTAK93 architecture include the following. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 545: Microprocessors
Functional description Microprocessors One microprocessor does the following: • handles data transfer between each pair of serial ports and software • reports the status of each port • takes commands from software to control the activities of the ports The microprocessors also handle some D-channel data processing in DCHI mode. DMA controller A Z80A-DMA chip controls the data transfer between local RAM memory and communication ports.
Page 546: Software Interface Circuit
• RR, CS: SPDC ready signal provided by DCHI-PORT • TR: D-PORT ready signal provided by DCHI-PORT • RDA, RDB: Incoming serial data bit stream, driven by SDTI/PRI • SDA, SDB: Transmit serial data bit stream driven by DCHI-PORT Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 547: Chapter 32: Ntbk22 Misp Card
Chapter 32: NTBK22 MISP card Contents This section contains information on the following topics: Introduction on page 547 Physical description on page 547 Functional description on page 548 Introduction The NTBK22 Multi-Purpose ISDN Signaling Processor (MISP) card is a microprocessor- controlled signaling processor that performs Data Link (Layer 2) and Network (Layer 3) processing associated with ISDN BRI and the OSI protocol.
Page 548: Functional Description
64 kbps. The HDLC converts messages into the following two message formats: • a serially transmitted, zero-inserted, CRC protected message that has a starting and an ending flag • a data structure Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 549: Cpu To Misp Bus Interface
Functional description CPU to MISP bus interface Information exchange between the CPU and the MISP is performed with packetized messages transmitted over the CPU bus. This interface has a 16-bit data bus, an 18-bit address bus, and interrupt and read/write control lines. This interface uses shared Static Random Access Memory (SRAM) as a communication exchange center between the CPU and the MPU.
Page 550 NTBK22 MISP card Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 551: Chapter 33: Ntbk50 2.0 Mb Pri Card
Chapter 33: NTBK50 2.0 Mb PRI card Contents This section contains information on the following topics: Introduction on page 551 Physical description on page 552 Functional description on page 554 Architecture on page 554 Introduction The NTBK50 2.0 Mb PRI card provides a 2.0 Mb PRI interface. It supports the NTAK20 clock controller daughterboard and either the NTAK93 D-channel interface or the NTBK51 Downloadable D-channel handler.
Page 552: Physical Description
The NTBK50 2.0 Mb PRI circuit card is disabled or out-of- service. Also, the state of the card after power-up, completion of self test, and exiting remote loopback. The NTBK50 2.0 Mb PRI is not in a disabled state. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 553: Power Requirements
Physical description State Definition On (Green) The NTBK50 2.0 Mb PRI circuit card is in an active state. The NTBK50 2.0 Mb PRI is in a disabled state. The OOS LED is red. On (Red) A red alarm state is detected. This represents a local alarm state of Loss of Carrier (LOS), Loss of Frame (LFAS), or Loss of CRC Multiframe (LMAS).
Page 554: Functional Description
The main functional blocks of the NTBK50 architecture are: • DS-30X interface • A07 signaling interface • digital pad • carrier interface • CEPT transceiver • SLIP control • D-channel support interface • clock controller interface Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 555: Ds-30X Interface
Architecture • Card-LAN / echo / test port interface • 80C51FA Microcontroller DS-30X interface NTBK50 interfaces to one DS-30X bus which contains 32-byte interleaved timeslots operating at 2.56 Mb. Each timeslot contains 10 bits in A10 message format; eight are assigned to voice/ data (64 Kbps), one to signaling (8 Kbps), and one is a data valid bit (8 Kbps).
Page 556: Signaling Interface
Carrier grounding NTBK50 enables the shield of the Tx and/or Rx pairs of the carrier to be selectively grounded. Closing (down position) the on-board switch applies FGND to the appropriate carrier cable Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 557: Cept Transceiver
Architecture shield. The switch settings are shown in Table 240: Carrier Shield grounding switch settings page 557. The switch should be kept in UP (off) position. Table 240: Carrier Shield grounding switch settings Switch Down (On) Up (Off) SW 4 – 1 Rx –...
Page 558: Slip Control
A Dual Port UART handles the functions of the serial ports for the Card-LAN serial link test port interface. The test interface is an asynchronous 4800 bps 8 bit connected to port A of the Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 559 Architecture UART. The card-LAN interface is an asynchronous 19.2 kbps 9 bit start/stop connected to port B of the UART. The connection to the test port is available at the backplane/MDF connector. The signals at this port conform to the EIA RS-232C standard. Circuit Card Reference July 2011...
Page 560 NTBK50 2.0 Mb PRI card Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 561: Contents
Chapter 34: NTBK51 Downloadable D- channel Handler daughterboard Contents This section contains information on the following topics: Functional description on page 569 Physical description on page 562 Functional description on page 562 Download operation on page 564 Introduction The NTBK51 daughterboard provides Downloadable D-channel Handler (DDCH) interfaces based on the Multipurpose Serial Data Link (MSDL).
Page 562: Chapter 34: Ntbk51 Downloadable D-Channel Handler Daughterboard
The main functional blocks of the NTBK51 architecture include the following: • Microprocessors • Main memory • Shared memory • EPROM memory • Flash EPROM memory • EEPROM memory • Serial communication controller Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 563: Microprocessors
Functional description • Sanity timer • Bus timer Microprocessors One microprocessor handles data transfer between each serial interface and software, reports the status of each port and takes commands from the software to control the activities of the ports. A high performance MPU supports the D-channel from the PRI card and other software applications running simultaneously on other ports of the DDCH card.
Page 564: Eeprom Memory
• during initialization when new software is installed • when enabling the card or application • during card reset (due to loss of software or corruption) • during a background audit Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 565: System Initialization
Download operation System initialization When new base or application software is installed on a CS 1000E, CS 1000M Cabinet, and Meridian 1 PBX 11C Cabinet, the download decision is made during system initialization. The actual MSDL base software download is done in background mode and can take several minutes to complete, depending on switch traffic and the size of the MSDL base software.
Page 566 NTBK51 Downloadable D-channel Handler daughterboard Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 567: Chapter 35: Ntck16 Generic Central Office Trunk Cards
Chapter 35: NTCK16 Generic Central Office Trunk cards Contents This section contains information on the following topics: Introduction on page 567 Physical description on page 568 Functional description on page 569 Operation on page 570 Electrical specifications on page 571 Connector pin assignments on page 572 Introduction...
Page 568: Physical Description
Tip and Ring leads. Switch settings There are no option switches on the NTCK16AX and NTCK16BX generic Central Office trunk cards. All settings are configured in software. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 569: Self-Test
Functional description Self-test When the NTCK16AX and NTCK16BX trunk cards are installed and power is applied to them, a self-test is performed on each card. The red LED on the faceplate flashes three times, then remains continuously lit until the card is enabled in software. If the self-test fails, the LED remains lit.
Page 570: Operation
To initiate a call, the CS 1000E, CS 1000M, and Meridian 1switches out the ringing detector and places a low resistance loop across the tip and ring leads. On trunks configured for battery supervision, the trunk card sends a seize acknowledge signal to software. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 571: Electrical Specifications
Electrical specifications The system sends digits in the form of Dual Tone Multifrequency (DTMF) tones or pulse digits. When the far-end answers, the Central Office reverses polarity. If the trunk is configured for battery supervision, it sends a polarity reversal message to software. Central Office disconnect There are two ways the Central Office can disconnect the call: •...
Page 572 Figure 162: NTCK16 Central Office trunk connections for NT8D37 I/O panel connectors A, E, K, R on page 574, Figure 163: NTCK16 Central Office trunk connections for NT8D37 I/O panel connectors B, F, L, S on page 575, and Figure 164: NTCK16 Central Office trunk Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 573: Configuration
Configuration connections for NT8D37 I/O panel connectors C, G, M, T on page 576 provide cross connect information for the NTCK16AX and NTCK16BX generic Central Office trunk cards. Configuration The trunk type for each unit on the card is selected by software service change entries at the system terminal.
Page 574 NTCK16 Generic Central Office Trunk cards Figure 162: NTCK16 Central Office trunk connections for NT8D37 I/O panel connectors A, E, K, Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 575 Configuration Figure 163: NTCK16 Central Office trunk connections for NT8D37 I/O panel connectors B, F, L, Circuit Card Reference July 2011...
Page 576: Ntck16Ax Central Office Trunk Card
NTCK16 Generic Central Office Trunk cards Figure 164: NTCK16 Central Office trunk connections for NT8D37 I/O panel connectors C, G, M, NTCK16AX Central Office trunk card Route Data Block Respond to the prompts in LD 16 as shown. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 577 Configuration Table 246: LD 16 - Route Data Block for NTCK16AX. Prompt Response Description REQ: Define a new unit TYPE: Define a new Route Data Block CUST Customer number as defined in LD 15. ROUT Route number 0-511 Range for Large System, Call Server 1000E, and Media Gateway 1000E 0-127 Range for Small System, CS 1000E system,...
Page 578: Ntck16Bx Central Office Trunk Card
Argentina07250 - 500 ms on/off Turkey1410 seconds of Tone 1: 200 ms off, 200 ms on; 200 ms off, 200 ms on; 200 ms off, 200 ms on; 200 ms off, 600 ms on; followed by Tone 2: 200 ms off, 200 ms on. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 579 Configuration Prompt Response Description 0-127 Range for Small System, CS 1000E system, Media Gateway 1000B, and Media Gateway 1000T TKTP Define trunk type as Central Office ICOG Incoming and Outgoing trunk CNTL Change a trunk timer TIMER RGV 256 Set Ring Validation Timer to 128 ms. (NO) PPM is off on this route.
Page 580: Btid Values By Country
PPM allows the user of a telephone to keep an accurate record of Central Office calls for billing or administration purposes. Detection limits Pulses detected by the NTCK16AX circuit card must be within the following limits: Frequency 11 880 to 12 120 Hz Level 105 to 1100 mVrms Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 581: Busy Tone Detect
Applications Note: The pack should not be used to detect levels of 1100 mVrms or greater a Tip and Ring, as this may result in noise. Pulse length Dependent on PPID – see LD 14 Busy tone detect Busy tone is sent by the Central Office to indicate the release of an established call. Detection limits The NTCK16AX and NTCK16BX generic Central Office trunk cards can detect busy tone within the following limits:...
Page 582: Trunk To Trunk Connection
When any disconnect supervision is configured (CLS = BAT, BTS), the Loop Start Trunk of the Generic XFCOT is marked as having disconnect supervision and therefore follows the same rules as a Ground Start Trunk. There is no configuration involved for this operation. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 583: Call Disconnect
Applications Call disconnect If any disconnect supervision is configured (CLS = BAT, BTS), the Loop Start Trunk is released when the disconnect signal is received. This applies also in call states such as ringing, camp- on, and DISA. There is no configuration involved for this operation. Circuit Card Reference July 2011...
Page 584 NTCK16 Generic Central Office Trunk cards Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 585: Chapter 36: Ntdw12Aae5 Universal Clock Controller Daughter Board
Chapter 36: NTDW12AAE5 Universal Clock Controller daughter board Contents This section contains information on the following topics: • Introduction on page 585 • Physical description on page 588 • Functional description on page 588 Introduction Digital trunking requires synchronized clocking so that a shift in one clock source results in an equivalent shift in all parts of the network.
Page 586: Clocking Modes
• use of an algorithm to detect crystal aging and qualify clocking information Clocking modes The CS 1000 supports a single clock controller that can operate in one of two modes: tracking or non-tracking (also known as free-run). Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 587: Tracking Mode
Introduction Tracking mode In tracking mode, one or more DTI/PRI cards supply a clock reference to the clock controller daughterboard. When operating in tracking mode, one DTI/PRI card is defined as the Primary Reference Source (PREF) for clock synchronization. The other DTI/PRI card is defined as the Secondary Reference Source (SREF).
Page 588: Physical Description
Functional description The main functional blocks of the Universal clock controller daughterboard include: • phase difference detector circuit • digital phase lock loops (PLL) • digital-to-analog converter • signal conditioning drivers and buffers Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 589: Phase Difference Detector Circuit
Functional description • sanity timer • microprocessor • CPU interface • Oven Controlled Voltage Controlled Oscillator (OCVCXO) Phase difference detector circuit This circuit, under firmware control, enables a phase difference measurement to be taken between the reference entering the PLL and the system clock. The phase difference is used for making frequency measurements and evaluating input jitter and PLL performance.
Page 590 If the primary recovers first, the clock controller tracks to the primary, but switches over to the secondary when the secondary recovers. If the secondary recovers first, the clock controller tracks to the secondary even if the primary recovers. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 591: Digital To Analog Converter
Functional description To prevent chatter due to repeated automatic switching between primary and secondary reference sources, a time-out mechanism of at least 10 seconds is implemented. Digital to analog converter The Digital to Analog Converter (DAC) enables the microprocessor to track, hold, and modify the error signal generated in the digital PLL.
Page 592 FCC part 15 sub- part J CSA C108.8 CISPR publication 22 IEC 801-2 Temperature IEC 68-2-1 IEC 68-2-2 IEC 68-2-14 Humidity IEC 68-2-3 Vibration/Shock IEC 68-2-6 IEC 68-2-7 IEC 68-2-29 IEC 68-2-31 IEC 68-2-32 Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 593: Contents
Chapter 37: NTDW60 Media Gateway Controller Card Contents This section contains information on the following topics: Introduction on page 593 Processor on page 596 Ethernet ports on page 596 Expansion daughterboards on page 596 Backplane interface on page 597 Serial data interface ports on page 597 Faceplate LED display on page 598...
Page 594: Chapter 37: Ntdw60 Media Gateway Controller Card
• Four character LED display on the faceplate. • Two PCI Telephony Mezzanine Card form factor sites for system expansion. • Real time clock (RTC). • Backplane interface. • Three serial data interface ports. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 595 Introduction Figure 165: MGC block diagram Circuit Card Reference July 2011...
Page 596: Processor
VoIP daughterboard only and provides Ethernet and TDM connectivity. It is not accessible from the faceplate and a PCI bus is not available. The other site provides a full PCI bus and faceplate accessibility in addition to Ethernet and TDM. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 597: Backplane Interface
Backplane interface Backplane interface The FPGA features include: • Serial data interface port • Time slot interchanger (TSIC) • SSD X12/A10 signaling interface • CE-Mux bus interface • CardLan interface • DS30x interface • TDM bus for tones and conference •...
Page 598: Faceplate Led Display
During normal operations the LED displays the IP Media Gateway (IPMG) superloop and MGC shelf number. If an error occurs the display cycles between the shelf number and the error code. Each item is displayed for 20 seconds. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 599: Contents
Chapter 38: NTDW20 Media Gateway Extended Peripheral Equipment Controller card Contents This section contains information on the following topics: Introduction on page 599 Processors on page 602 Ethernet interfaces on page 603 Backplane interface on page 603 LED indicators on page 604 Network connections and dual homing on page 604 Introduction...
Page 600: Chapter 38: Ntdw20 Media Gateway Extended Peripheral Equipment Controller Card
XPEC shelves, see Communication Server 1000E Installation and Commissioning (NN43041-310) • One Remote TTY for XSM • MG XPEC MB also provides a relay to replace the PFTU relay in the XSM module loaded in the base of the column Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 601 Introduction Figure 166: MG XPEC block diagram The MGC and MG XPEC run the same MGC loadware. A run-time check exists to identify which hardware platform the MGC loadware is running on. Therefore, each half of the dual card assembly functions identically to the MGC, except for the following differences: •...
Page 602: Processors
UARTs and Ethernet interfaces. DSP processors Two on-board M82710 processors, as two High Density DSP DB (on-board), provide 192 DSP Channels with media security. The MindSpeed Picasso processor (M82710) voice solution is used. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 603: Ethernet Interfaces
Ethernet interfaces Ethernet interfaces The Chagall-2 processor contains two external Ethernet interfaces as well as internal virtual Ethernet ports. The MSP controls both external Ethernet interfaces and the CSP accesses them through a virtual Ethernet port as part of the internal shared memory bus. One interface, the standard Chagall-2 Ethernet port, provides the media path and slave control interface (TLAN) and the other provides the ELAN interface.
Page 604: Led Indicators
Faceplate connections must be routed to the rear I/O using the new NTDW25AAE6 cable kit. See Figure 167: MG XPEC faceplate on page 605 for the MG XPEC faceplate. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 605 Network connections and dual homing Figure 167: MG XPEC faceplate Dual homing works independently for each half of the dual assembly board. Network traffic sent and received on one board is not seen by the other. To connect an MG XPEC for dual homing, each half requires the following: •...
Page 606 TLAN connection is required for each board in the dual assembly. You do not have to connect both halves of the board to get the other working, since each half of the dual assembly is stand alone. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 607: Contents
Chapter 39: NTDW56 and NTDW59 Common Processor Media Gateway card Contents This section contains information on the following topics: • Introduction on page 607 • Cabinet and chassis support on page 609 • Faceplate on page 610 • Status LED on page 610 •...
Page 608: Chapter 39: Ntdw56 And Ntdw59 Common Processor Media Gateway Card
• One backplane 100 BaseT E-LAN port • Faceplate status LED and card reset buttons • In-rush power controller to support hot-plug The CP MG hardware block diagram is a schematic of the CP MG hardware. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 609: Cabinet And Chassis Support
Cabinet and chassis support Figure 168: CP MG hardware block diagram The Gateway Controller component of the CP MG card is based on the same architecture as the MGC card. For more information about the Gateway Controller architecture, see NTDW60 Media Gateway Controller Card on page 593.
Page 610: Faceplate
The CP and MG status LEDs are tri-color status indicators for each component, see Table 256: CP MG faceplate LED status on page 611. The HD status LED flashes to indicate SATA hard drive activity. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 611: Led Display
LED display Table 256: CP MG faceplate LED status LED color Common Processor status Gateway Controller status Green All applications running Not used Orange Linux running, applications Self test error booting BIOS and Linux Base initializing Booting Flashing Red Not used Self test passed No power Running, or no power...
Page 612: Serial Data Interface Ports
The CP MG card provides four external Ethernet LAN connections. Two connections are on the faceplate, and two connections are on the backplane. Dual homing is supported on each pair of LAN connections. The CP MG card does not support a High Speed Pipe (HSP) connection. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 613: Media Storage
Media storage The two faceplate Ethernet ports (1E, 2T) provide TLAN and ELAN connections. The Ethernet ports contain integrated LEDs to provide link, activity, and speed indicators, see Table 259: CP MG faceplate TLAN and ELAN LED status on page 613. Table 259: CP MG faceplate TLAN and ELAN LED status Ethernet port LED color Status...
Page 614 You can reinstall the CP MG card into the Media Gateway cabinet or chassis. If the replacement hard drive does not have Linux Base pre-installed, install the Linux Base software from a bootable USB 2.0 flash drive. For more information, see Nortel Communication Server 1000 New in this Release, NN43001-115.
Page 615: Security Device (Dongle)
Security Device (Dongle) Security Device (Dongle) The installation of the CP MG Security Device is the same procedure as a CP PM card, however the device is in a different location on the CP MG. Figure 172: CP MG Security Device (Dongle) on page 615 shows the location of the dongle on the CP MG.
Page 616 NTDW56 and NTDW59 Common Processor Media Gateway card Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 617: Contents
Chapter 40: NTDW53 and NTDW54 Common Processor Dual Core card Contents This section contains information on the following topics: • Introduction on page 617 • Cabinet and chassis support on page 618 • Faceplate on page 619 • Status LED on page 619 •...
Page 618: Chapter 40: Ntdw53 And Ntdw54 Common Processor Dual Core Card
Slot 0 in the Option 11C , Option 11C expansion, Option 11C Mini and MG 1000E main chassis are reserved for the Gateway Controller. Slot 4 in the Option 11C Mini is reserved for the 48 DLC. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 619: Faceplate
Faceplate Faceplate The CP DC card is available in two sizes: NTDW53 single slot, and NTDW54 double slot. The CP DC card faceplate provides a reset button, status LEDs, three USB 2.0 ports, one VGA port, and two Gigabit Ethernet ports. The NTDW53 CP DC card faceplate is shown in Figure 173: NTDW53 CP DC faceplate on page 619.
Page 620: Ethernet Connections
CP DC card is 9600 bps, no parity, 1 stop bit. The CP DC card serial port connection procedure remains the same as the CP PM card . For more information, see Linux Platform Base and Applications installation and commissioning, NN43001-315 . Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 621: Media Storage
You can reinstall the CP DC card into the Media Gateway cabinet or chassis. If the replacement hard drive does not have Linux Base pre-installed, install the Linux Base software from a bootable USB 2.0 flash drive. For more information, see Nortel Communication Server 1000 New in this Release, NN43001-115.
Page 622: Security Device (Dongle)
176: CP DC security dongle on page 622 shows the location of the dongle on the CP DC card. Figure 176: CP DC security dongle Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 623: Contents
Chapter 41: NTDW61 and NTDW66 Common Processor Pentium Mobile Card Contents This section contains information on the following topics: Introduction on page 623 Cabinet/chassis support on page 626 Media storage on page 626 Memory on page 630 Ethernet interfaces on page 635 Serial data interface ports on page 636 USB 2.0 port...
Page 624: Chapter 41: Ntdw61 And Ntdw66 Common Processor Pentium Mobile Card
For example, the CP PM hardware can be used as a Call Server or as a platform for the CS 1000 Signaling Server. The CP PM high level hardware block diagram is a schematic of the CP PM hardware. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 625 Introduction Figure 177: CP PM high level hardware block diagram Figure 178: CP PM card Circuit Card Reference July 2011...
Page 626: Cabinet/Chassis Support
The removable media drive (RMD) is a hot swappable CF card accessible from the CP PM faceplate. The CS 1000 software is shipped on a CF card and is loaded onto the CP PM through the RMD. This drive is also used for data backups. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 627: Hard Disk Drive
Media storage Hard disk drive The CP PM hardware can be used as a platform for the CS 1000 Signaling Server. When deployed as a signaling server, the CP PM platform is equipped with a hard disk drive. Note: The hard drive must have its jumper set for CSEL operation before installation. Install a hard drive on a Nortel CP PM Signaling Server This section describes the procedure for installing a hard drive on both models of the Nortel CP PM Signaling Server (NTDW61BAE5 and NTDW66AAE5).
Page 628 2. Place hard drive on printed circuit board and slide to mate with connector J32. Figure 180: CP PM hard drive and connector J32 3. Secure hard drive from the bottom side with the included screws. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 629 Media storage Figure 181: Securing CP PM hard drive to circuit board 4. Place Dip Switch S5 in position 2 to select HD Master option. Figure 182: CP PM Signaling Server FMD dip switch Important: A Nortel CP PM circuit card has an on-board switch (S5) for designating the internal hard drive (HD) or internal Compact Flash (CF) drive as the Fixed Media Device (FMD) for the Signaling Server.
Page 630: Memory
This section details the procedure to upgrade the CP PM memory. Ensure that the memory upgrade kit contains a DDR memory module as seen in Figure 184: DDR memory module on page 631 Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 631 Memory Figure 184: DDR memory module Upgrading the CP PM memory 1. Locate an empty memory slot on the CP PM card, as shown in Figure 185: CP PM card with empty memory slot on page 631 Figure 185: CP PM card with empty memory slot 2.
Page 632 3. While holding the memory module in place, push it down until the two clips on either side snap into place, as shown inFigure 187: Fastening memory module in CP PM card on page 633 Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 633 Memory Figure 187: Fastening memory module in CP PM card Note: If the memory module is not aligned properly, the clips will not snap in place, as shown in Figure 188: Incorrectly aligned memory module on page 634. Remove the memory module and align it correctly. Circuit Card Reference July 2011...
Page 634 4. Ensure that the pins of the memory module are just visible and parallel with the edge of the slot. The module pins must make proper contact with the slot pins, as shown Figure 189: Correctly aligned memory module on page 635 Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 635: Ethernet Interfaces
Ethernet interfaces Figure 189: Correctly aligned memory module Note: If the module pins do not make proper contact with the slot pins, the system may not recognize the presence of the module. Ethernet interfaces There are three Ethernet network interfaces on a CP PM card: HSP, TLAN and ELAN. The network interfaces are application specific.
Page 636: Tlan
• Data bit length: 5-8. • Stp bit: 1, 1.5, and 2. • Parity: odd, even, and none. Default parameters for both ports: • Baud rate: 9600. • Data bit length: 8. • Stop bit: 1. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 637: Usb 2.0 Port
USB 2.0 port • Parity: none. • Flow control: none. USB 2.0 port The USB port is not currently used by the Call Server or Signaling Server applications. Security device The CS 1000 provides an on-board interface for the existing security device (dongle) using a Maxim/Dallas 1-wire to USB interface device.
Page 638 NTDW61 and NTDW66 Common Processor Pentium Mobile Card Figure 190: CP PM NTDW61 and NTDW66 faceplates Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 639: Faceplate Buttons
LED indicators Faceplate buttons Reset Reset (RST) generates a hard reset of the card. Init Init (INI) generates a manual initialization of the software. DIP switch The DIP switch selects the media drive. CF MASTER/POSITION1 selects the Compact Flash (CF) FMD and HD MASTER/POSITION2 selects the Hard Drive FMD. LED indicators Status LED The functionality of the Status LED is summarized in the following table.
Page 640: Active Cpu Led
The functionality of the ELAN and TLAN network interface LED indicators is depicted in the following figure. Figure 191: ELAN and TLAN port LED indicators HSP LEDs The functionality of the HSP port LED indicators is depicted in the following figure. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 641: Removable And Fixed Media Drive Leds
LED indicators Figure 192: HSP port LED indicators Removable and fixed media drive LEDs LEDs are provided to indicate the access/activity of the removable and fixed media drives. Circuit Card Reference July 2011...
Page 642 NTDW61 and NTDW66 Common Processor Pentium Mobile Card Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 643: Contents
Chapter 42: NTDW62, NTDW64, and NTDW78 Media Gateway Controller Daughterboards Contents This section contains information on the following topics: Introduction on page 643 Media Gateway Controller card on page 643 Daughterboard configurations on page 644 Introduction The NTDW60 or NTDW98 Media Gateway Controller (MGC) card has two PCI Telephony Mezzanine Card form factor expansion sites.
Page 644: Chapter 42: Ntdw62, Ntdw64, And Ntdw78 Media Gateway Controller Daughterboards
Figure 193: Media Gateway Controller with daughterboards Figure 194: Daughterboard Daughterboard configurations The DBs are available in three sizes: An NTDW62 32-port daughterboard (DB-32), an NTDW64 96-port daughterboard (DB-96), and an NTDW78 128-port daughterboard (DB-128). Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 645 Daughterboard configurations There are four possible Media Gateway configurations: • A pure TDM single Media Gateway with no DSP daughterboards or Media Cards. • A system with only Voice Gateway Media Cards. • A system with only DSP daughterboards. • A system with both DSP daughterboards and Media Cards. The DB-32, DB-96, and DB-128 are supported in both expansion sites on the MGC card.
Page 646 NTDW62, NTDW64, and NTDW78 Media Gateway Controller Daughterboards Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 647: Contents
Chapter 43: NTDW65 Voice Gateway Media Card Contents This section contains information on the following topics: Introduction on page 647 Ethernet ports on page 648 Backplane interfaces on page 649 Serial data interface ports on page 649 Faceplate LED display on page 649 Introduction The NTDW65 MC32S Media Card provides 32 IP-TDM gateway ports between an IP device...
Page 648: Chapter 43: Ntdw65 Voice Gateway Media Card
There are TLAN and ELAN network interfaces for connection to external networks, and a faceplate debug port. Internal connections There is a TLAN connection to the DSP, and ELAN and TLAN connections to the processor. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 649: Backplane Interfaces
Backplane interfaces Backplane interfaces The FPGA features include: • DS30X interfaces. • A10 signalling. • CardLan interface. • Hardware watchdog. • Time-switch for flexible TDM timeslot mapping. Serial data interface ports The Media Card has two serial data interface ports on the master MSP. The installation menu can by accessed through either port.
Page 650 If there is a fatal self-test error during bootup, an error code appears and the PASS and LOAD message are not displayed. During normal operation after bootup, the faceplate displays Leader (L) or Follower (F) and the number of registered sets. For example, 'L027' means Leader of 27 sets Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 651: Contents
Chapter 44: NTRB21 DTI/PRI/DCH TMDI card Contents This section contains information on the following topics: Introduction on page 651 Physical description on page 652 Functional description on page 655 Software description on page 656 Hardware description on page 656 Architecture on page 656 Introduction The NTRB21 (DTI/PRI/DCH) TMDI digital trunk card is a 1.5 Mb DTI or PRI interface to the...
Page 652: Chapter 44: Ntrb21 Dti/Pri/Dch Tmdi Card
The NTRB21 card has seven faceplate LEDs. The first five LEDs are associated with the NTRB21 card. The remaining two LEDs are associated with the clock controller and DCHI daughterboards. See Figure 196: NTRB21 TMDI card with clock controller on page 653. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 653 Physical description Figure 196: NTRB21 TMDI card with clock controller In general, the first five LEDs operate as follows: • During system power up, the LEDs are on. • When the self-test is in progress, the LEDs flash on and off three times, then go into their appropriate states, as shown in Table 265: NTRB21 LED states on page 653.
Page 654 NTRB21 is in loop-back mode. NTRB21 is not in loop-back mode. Figure 197: NTRB21 TMDI card faceplate on page 654 shows the faceplate of the NTRB21 TMDI card. Figure 197: NTRB21 TMDI card faceplate Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 655: Power Requirements
Functional description Power requirements The DTI/PRI obtains its power from the backplane, and draws less than 2 amps on +5 V, 50 mA on +12 V, and 50 mA on –12 V. Foreign and surge voltage protection Lightning protectors must be installed between an external T1 carrier facility and the system. For public T1 facilities, this protection is provided by the local operating company.
Page 656: Software Description
DS-30X link. Messages transmitted in both directions are three bytes long. Interconnection The interconnection to the carrier is by NTBK04, a 1.5 Mb 20 ft. carrier cable. The NT8D97AX, a fifty-foot extension cable, is also available. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 657: Microprocessor
Architecture Microprocessor The NTRB21 is equipped with bit-slice microprocessors that handle the following major tasks: • Task handler: also referred to as an executive. The task handler provides orderly per- channel task execution to maintain real-time task ordering constraints. • Transmit voice: inserts digital pads, manipulates transmit AB bits for DS1, and provides graceful entry into T-Link data mode when the data module connected to the DTI/PRI trunk is answering the call.
Page 658: D-Channel Interface
On the NTRB21 use switch 1, position 1 to select either the D-channel feature or the DPNSS feature, as follows: OFF = D-channel The ON setting for DPNSS (U.K.) is not supported at this time. OFF = D-channel ON = DPNSS (U.K.). OFF = D-channel Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 659: Ds-1 Carrier Interface
Architecture The ON setting for DPNSS (U.K.) is not supported at this time. DS-1 Carrier interface Transmitter The transmitter takes the binary data (dual unipolar) from the PCM transceiver and produces bipolar pulses for transmission to the external digital facility. The Digital Signal – Level 1 (DS-1) transmit equalizer enables the cabling distance to be extended from the card to the Digital Signal Cross-connect –...
Page 660: Ntak20 Clock Controller (Cc) Daughterboard
The clock controller circuitry synchronizes the CS 1000 to an external reference clock and generates and distributes the clock to the system. The CS 1000 can function either as a slave to an external clock or as a clocking master to the network. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 661 Architecture Clock rate converter The 1.5 Mb clock is generated by a Phase-Locked Loop (PLL). The PLL synchronizes the 1.5 Mb DS1 clock to the 2.56 Mb system clock through the common multiple of 8 kHz by using the main frame synchronization signal. Circuit Card Reference July 2011...
Page 662 NTRB21 DTI/PRI/DCH TMDI card Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 663: Chapter 45: Ntvq01Xx Media Card
Chapter 45: NTVQ01xx Media Card Contents This section contains information on the following topics: Physical description on page 663 Hardware architecture on page 664 Functional description on page 667 Physical description The Media Card replaces the ITG Pentium card and is available as an 8-port or 32-port card. You can install this card in slots 1 through 4 in the Media Gateway or slots 7 through 10 in the Media Gateway Expansion.
Page 664: Hardware Architecture
LANs. This section provides information about the faceplate connectors and indicators. Hardware architecture The Media Card comes in two versions: 8-port and 32-port. Faceplate connectors and indicators Figure 199: NTVQ01xx Media Card faceplate on page 666 shows the NTVQ01xx Media Card faceplate. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 665: Reset Switch
Hardware architecture Reset switch The reset switch on the faceplate manually resets the Media Card. Status LED The NTVQ01xx Media Card faceplate red LED indicates the following: • the enabled/disabled status of the card • the self-testing result during power up or card insertion into an operational system PC card slot This slot accepts standard PC card flash cards, including ATA Flash cards (3 Mbit/s to 170 Mbit/s).
Page 666 RS-232 port. This faceplate port can provide access to the Media Card for OA&M purposes. The maintenance port is also available through a female DB9 connector on the 50-pin I/O Adaptor. This should be used to make a permanent terminal connection. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 667: Functional Description
Functional description Functional description Media Cards use different types of firmware pre-installed, depending on the application being supported. The Voice Gateway application enables Digital Signal Processors (DSPs) for either line or trunk applications. When the Voice Gateway application is installed on the Media Card, the card is called the Voice Gateway Media card.
Page 668 NTVQ01xx Media Card Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 669: Contents
Chapter 46: NTC314AAE6 Media Gateway utility card Contents This section contains information on the following topics: Physical description on page 669 Functional description on page 669 Physical description The NTC314AAE6 MG1010 utility card is a standard card size with a two inch metal faceplate. The Utility card is inverted to accommodate power connections on the backplane.
Page 670: Chapter 46: Ntc314Aae6 Media Gateway Utility Card
LEDs are controlled by controller circuitry on the blower modules. The following tables describe the LED states for the power supply, blowers, and ringing and message waiting. Table 269: Power supply LED states LED Color Status Green Normal Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 671: Mgu Dip Switch Settings
MGU dip switch settings LED Color Status Partial Failure Extinguished Total failure Yellow Power supply is not installed Table 270: Blower LED states LED Color Status Green Normal Failure Table 271: Ringing and message waiting LED states LED Color Status Green Normal Failure...
Page 672 See the following tables for international power supply DIP switch settings: • Asia Pacific/CALA power supply DIP switch settings • European power supply DIP switch settings • North American power supply DIP switch settings Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 673 MGU dip switch settings Table 278: Asia Pacific power supply DIP switch settings Ring Frequency(Hz) Ringing Message waiting Lamp(VDC) Amplitude(Vrms) Switch 20 25 50 Switch 70 75 80 86 Switch -120 Setting Setting Setting S1_3 S1_4 S1_8 S1_5 S1_6 S1_7 Table 279: European power supply DIP switch settings Ring Frequency(Hz) Ringing...
Page 674: Rear Components
The following figure shows the rear components of the MG 1010. Note the following: • Hot swappable redundant power supplies • Hot swappable fans in a redundant N + 1 configuration for chassis cooling • One DECT connector • One AUX connector • Ten MDF connectors Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 675 MGU dip switch settings Figure 202: MG 1010 rear view Important: If your MG 1010 includes a cover over the Power Supply 2 connector, remove the cover by loosening the two Phillips screws and sliding the cover upwards. Once the cover is removed, tighten the two Phillips screws again.
Page 676 NTC314AAE6 Media Gateway utility card Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 677: Contents
Chapter 47: QPC841 Quad Serial Data Interface card Contents This section contains information on the following topics: Introduction on page 677 Physical description on page 678 Functional description on page 679 Connector pin assignments on page 680 Configuring the QSDI card on page 682 Applications on page 686...
Page 678: Chapter 47: Qpc841 Quad Serial Data Interface Card
LED. The LED indicates that the card is disabled. It is lit when the following occurs: • the ENB/DIS switch is set to DIS • all of the ports on the card are disabled in software • none of the card ports are configured in software Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 679: Functional Description
Functional description Figure 203: QPC841 QSDI card front panel Functional description The QPC841 Quad Serial Data Interface card contains all the logic for four asynchronous serial ports, including the baud rate generators. These serial ports are directly accessed by the system processor using memory reads and writes.
Page 680: Connector Pin Assignments
B, and Port 4 is connected to connector C. Table 281: Connector J1 pin assignments on page 681 shows the pinouts for connector J1, Table 282: Connector J2 pin assignments on page 681 shows the pinouts for connector Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 681 Connector pin assignments Table 281: Connector J1 pin assignments Pin number Signal Purpose in DTE mode Purpose in DCE mode Frame ground Frame ground Received data Transmitted data Transmitted data Received data Request to send (not used) Request to send (Note 2) Clear to send (Note 1) Clear to send Data set ready (Note 1)
Page 682: Configuring The Qsdi Card
• DTE/DCE mode Figure 205: QSDI card option switch locations on page 685 shows the location of the option switches on the QSDI card. Instructions for setting these switches are in the section that follows. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 683: Address Switch Settings
Configuring the QSDI card Address switch settings Table 283: QSDI card address switch settings on page 683 lists the address switch settings for the QPC841 Quad Serial Data Interface card. The address select jumpers and logic on the card address the UARTs using two pairs of addresses: 0 and 1, 2 and 3, through 15 and 16. The pairs do not need to be consecutive.
Page 684: Dte/Dce Mode Switch Settings
Port 2 – SW7 Mode DTE (Terminal) DCE (Modem) Port 3 – SW4 Port 3 – SW5 Mode DTE (Terminal) DCE (Modem) Port 4 – SW2 Port 4 – SW3 Mode DTE (Terminal) DCE (Modem) Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 685: Test Switch Setting
Configuring the QSDI card Test switch setting Switch SW16 is only used for factory testing; all of its switches must be set to OFF for proper operation. Figure 205: QSDI card option switch locations Software service changes Once the QPC841 QSDI card is installed in the system, the system software needs to be configured to recognize it.
Page 686: Applications
1 of the QSDI card to outside peripherals. Connector J2 is non-standard in that it contains the connections for the three remaining serial ports (ports 2, 3, and 4), on a single DB-25 connector. Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 687 Applications An adapter cable must be used to connect to standard RS-232-C peripherals. Cables that are applicable to the QSDI card are: • SDI male-to-female flat cables (internal module use only) - NT8D82 - QCAD290 Note: This cable is available in different lengths. Refer to Equipment Identification (NN43001-254) for more information - QCAD42 •...
Page 688 QPC841 Quad Serial Data Interface card Figure 206: QPC841 QSDI card cabling Circuit Card Reference July 2011 Comments? infodev@avaya.com...
Page 689: Index
Index A-Law companding support ........ cable ..............ACD (Automatic Call Distribution) ..installation ............link to NT8D41BA paddleboard ....requirements ............address switch settings ...... cabling ......NT8D41BA QSDI ........ for line cards ............addresses ..........length considerations ........... altitude limitations ............. NT1R20 Off-Premise Station (OPS) Analog Line altitude ranges ............
Page 690 NT8D14 Universal Trunk Card ......interface units ............columns, cables for ........... digitone receiver cards ..........compatibility with Meridian 1 options (table) ....testing ..............component layout ............. DIS MSDL x command ......– conference cards ............DIS MSDL x command] ..........testing ..............
Page 691 ENL MSDL x command ......– environment for storing cards ........environment requirements ........I/O device selectability ..........environmental specifications .. I/O panel, cables and connections ....impedance ..NT1R20 Off-Premise Station (OPS) Analog Line matching network ..........Card ............NT1R20 Off-Premise Station (OPS) Analog Line NT8D02 Digital Line Card ......
Page 692 J1/J2 connectors ........loop interface support for 20 mA current . . . jumper setting options ..........loop interfaces ........jumper strap settings ......TCM (time compressed multiplexed) data ... NT8D15 E and M Trunk Card ......NT8D14 Universal Trunk Card .... loop limits ............
Page 693 with NT8D09 Analog Message Waiting Line Card card slots by Meridian 1 system ......monitor connectors ..........NT4D18 Hybrid Bus Terminator ......... mounting ..........card slots by Meridian 1 system ......NT8D41BA QSDI paddle board .... NT4D19 and NT423 Hybrid Bus Terminator ....QPC841 QSDI (Quad Serial Data Interface) card slots by Meridian 1 system ......
Page 694 card slots by Meridian 1 system ......electrical characteristics ........NT5K90 Central Office Trunk Card ......environmental specifications ....... card slots by Meridian 1 system ......faceplate ............. NT5K90 Central Office Trunk Card ....foreign and surge voltage protection ....NT5K93 Central Office Trunk Card ......
Page 695 card interfaces ............ option settings ............ configuration ............NT8D22 System Monitor .......... connector pin assignments ........ option settings ............ description ..........NT8D35 Network Module ......... DID operation ..........NT8D37 IPE Modules ........... electrical specifications ........network connections to ........environmental specifications ......trunk card installation ...........
Page 696 NTBK51 Downloadable D-Channel handler ..... IPE trunk card support ......... NTCK16 Generic Central Office Trunk Card ..NT8D14 Universal Trunk Card ....card slots by Meridian 1 system ......NT8D15 E and M Trunk Card ..... trunk number and types supported ...... PE trunk card support ..........
Page 697 programmable serial ports ........ QPC841 cards ............PROM (Programmable Read Only Memory) .... QPC841 QSDI (Quad Serial Data Interface) ..PSDL ................ PSP/PIP (polarity-sensitive/-insensitive packs) . applications ............cabling ..............configuring ............connector pin assignments ........ QCAD290 cables ............described ............ QCAD328 cable ............
Page 698 self-tests ..........– system disabled MSDL states ......Self-tests Failed substate ........system initialization ........... Self-tests Passed substate ........ serial connectors, where located ........ serial interface ............serial ports .......... TCM (time compressed multiplexed) data ..NT8D41BA Quad Serial Data Interface Card ..loop interfaces .......
Page 699 UART (Universal Asynchronous Receiver/Transmitter) NT8D02 Digital Line Card ..................NT8D09 Analog Message Waiting Line Card ..UART for addressing on the QSDI .... voltages ..............variable gain filters ..........voice-only communication .......... WATS (Wide Area Telephone Service) trunks ..voltage surge protection ..

Avaya Nortel Communication Server 1000 Reference

Chapter 1: New in this Release

Chapter 2: How to Get Help

Chapter 3: Introduction

Chapter 4: Overview

Chapter 5: Circuit Card Installation

Chapter 6: Acceptance Tests

Chapter 7: Option Settings

Chapter 8: NT1R20 Off-Premise Station Analog Line Card

Chapter 9: NT4N39AA CP Pentium IV Card

Chapter 10: NT5D11 and NT5D14 Lineside T1 Interface Cards

Chapter 11: NT5D33 and NT5D34 Lineside E1 Interface Cards

Chapter 12: NT5D60/80/81 CLASS Modem Card (XCMC)

Chapter 13: NT5D97 Dual-Port DTI2 PRI2 Card

Chapter 14: NT5K02 Flexible Analog Line Card

Chapter 15: NT5K21 XMFC/MFE Card

Chapter 16: NT6D70 SILC Line Card

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