Exiting Halt - Intel 80C186EA User Manual

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CLKOUT
ALE
S2:0
AD15:0
[AD7:0]
[A15:8]
A19:16
Note
BHE
Note
[RFSH=1]
NOTE: Drives previous bus cycle value
Figure 3-28. Returning to HALT After a DMA Bus Cycle
3.5.6

Exiting HALT

In Powerdown mode, only an NMI forces the BIU to exit the HALT bus state. In any other power
management mode, either an NMI or any unmasked INTn interrupt causes the BIU to exit HALT.
The first bus operations to occur after exiting HALT are read cycles to reload the CS:IP registers.
Figure 3-29 and Figure 3-30 show how the HALT bus state is exited when an NMI or INTn oc-
curs.
T4
T1 T2 T3 T4 T1 T2 T3
Valid Status
Addr
Note
Address
8H
Addr
Valid
BUS INTERFACE UNIT
TI
Valid Status
Valid Data
Addr
Address
Addr
8H
Valid
TI
TI
TI
A1052-0A
3-33

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