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BUS INTERFACE UNIT
CLKOUT
HOLD
HLDA
AD15:0
DEN
A19:16
RD, WR,
BHE, S2:0
DT/R,
LOCK
NOTES:
1. HLDA is deasserted, signaling need to run refresh bus cycle.
2. External bus master terminates use of the bus.
3. HOLD deasserted.
4. Hold may be reasserted after one clock.
5. BIU runs refresh cycle.
The device requesting a bus hold must be able to detect a HLDA pulse that is one clock in dura-
tion. A bus lockup (hang) condition can result if the requesting device fails to detect the short
HLDA pulse and continues to wait for HLDA to be asserted while the BIU waits for HOLD to be
deasserted. The circuit shown in Figure 3-37 can be used to latch HLDA.
3-44
1
2
Figure 3-36. Refresh Request During HOLD
3
4
5
5
A1061-0A
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