Intel 80C186EA User Manual page 406

Table D-4. Mnemonic Encoding Matrix (Right Half)
x8 x9 xA
OR OR OR
b,f,r/m w,f,r/m b,t,r/m
SBB SBB SBB
b,f,r/m w,f,r/m b,t,r/m
SUB SUB SUB
b,f,r/m w,f,r/m b,t,r/m
CMP CMP CMP
b,f,r/m w,f,r/m b,t,r/m
DEC DEC DEC
AX CX DX
POP POP POP
AX CX DX
PUSH IMUL PUSH
w,i w,i
JS JNS JP/
JPE
MOV MOV MOV
b,f,r/m w,f,r/m b,t,r/m
CBW CWD CALL
L,D
TEST TEST STOS
b,ia w,ia
MOV MOV MOV
i→AX i→CX i→DX
ENTER LEAVE RET
l(i+SP)
ESC ESC ESC
0 1
CALL JMP JMP
CLC STC CLI
NOTE: Table D-5 defines abbreviations used in this matrix. Shading indicates reserved opcodes.
INSTRUCTION SET OPCODES AND CLOCK CYCLES
xB xC
OR OR
w,t,r/m b,i
SBB SBB
w,t,r/m b,i
SUB SUB
w,t,r/m b,i
CMP CMP
w,t,r/m b,i
DEC DEC
BX SP
POP POP
BX SP
IMUL INS
b,i w,i b
JNP/ JL/
JPO JNGE
MOV MOV
w,t,r/m sr,f,r/m
WAIT PUSHF
STOS LODS
MOV MOV
i→BX i→SP
RET INT
l type 3
ESC ESC
2 3 4
JMP IN
STI CLS
xD xE xF
OR PUSH
w,i CS
SBB PUSH POP
w,i DS DS
SUB SEG DAS
w,i =CS
CMP SEG AAS
w,i =DS
DEC DEC DEC
BP SI DI
POP POP POP
BP SI DI
INS OUTS OUTS
w b w
JNL/ JLE/ JNLE/
JGE JNG JG
LEA MOV POP
sr,t,r/m r/m
POPF SAHF LAHF
LODS SCAS SCAS
MOV MOV MOV
i→BP i→SI i→DI
INT INTO IRET
(any)
ESC ESC ESC
5 6 7
IN OUT OUT
STD Grp2 Grp2
b,r/m w,r/m
0x
1x
2x
3x
4x
5x
6x
7x
8x
9x
Ax
Bx
Cx
Dx
Ex
Fx
D-21