Table of Contents
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CONTENTS
CHAPTER 6
CHIP-SELECT UNIT
6.1
COMMON METHODS FOR GENERATING CHIP-SELECTS....................................... 6-1
6.2
CHIP-SELECT UNIT FEATURES AND BENEFITS ...................................................... 6-1
6.3
CHIP-SELECT UNIT FUNCTIONAL OVERVIEW ......................................................... 6-2
6.4
PROGRAMMING ........................................................................................................... 6-6
6.4.1
Initialization Sequence ..............................................................................................6-6
6.4.2
Programming the Active Ranges ............................................................................6-12
6.4.2.1
UCS Active Range ........................................................................................6-12
6.4.2.2
LCS Active Range .........................................................................................6-13
6.4.2.3
MCS Active Range ........................................................................................6-13
6.4.2.4
PCS Active Range .........................................................................................6-15
6.4.3
Bus Wait State and Ready Control .........................................................................6-15
6.4.4
Overlapping Chip-Selects .......................................................................................6-16
6.4.5
Memory or I/O Bus Cycle Decoding ........................................................................6-17
6.4.6
Programming Considerations ..................................................................................6-17
6.5
CHIP-SELECTS AND BUS HOLD............................................................................... 6-18
6.6
EXAMPLES ................................................................................................................. 6-18
6.6.1
Example 1: Typical System Configuration ..............................................................6-18
CHAPTER 7
REFRESH CONTROL UNIT
7.1
THE ROLE OF THE REFRESH CONTROL UNIT......................................................... 7-2
7.2
REFRESH CONTROL UNIT CAPABILITIES................................................................. 7-2
7.3
REFRESH CONTROL UNIT OPERATION.................................................................... 7-2
7.4
REFRESH ADDRESSES............................................................................................... 7-4
7.5
REFRESH BUS CYCLES .............................................................................................. 7-5
7.6
GUIDELINES FOR DESIGNING DRAM CONTROLLERS............................................ 7-5
7.7
PROGRAMMING THE REFRESH CONTROL UNIT..................................................... 7-7
7.7.1
Calculating the Refresh Interval ................................................................................7-7
7.7.2
Refresh Control Unit Registers .................................................................................7-7
7.7.2.1
Refresh Base Address Register ......................................................................7-8
7.7.2.2
Refresh Clock Interval Register .......................................................................7-8
7.7.2.3
Refresh Control Register .................................................................................7-9
7.7.3
Programming Example ...........................................................................................7-10
7.8
REFRESH OPERATION AND BUS HOLD.................................................................. 7-12
vi
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