Table of Contents
Advertisement
INSTRUCTION SET DESCRIPTIONS
Name
ADD
Addition:
ADD dest , src
Sums two operands, which may be
bytes or words, replaces the
destination operand. Both operands
may be signed or unsigned binary
numbers (see AAA and DAA).
Instruction Operands:
ADD reg, reg
ADD reg, mem
ADD mem, reg
ADD reg, immed
ADD mem, immed
ADD accum, immed
AND
And Logical:
AND dest , src
Performs the logical "and" of the two
operands (byte or word) and returns
the result to the destination operand. A
bit in the result is set if both corre-
sponding bits of the original operands
are set; otherwise the bit is cleared.
Instruction Operands:
AND reg, reg
AND reg, mem
AND mem, reg
AND reg, immed
AND mem, immed
AND accum, immed
NOTE: The three symbols used in the Flags Affected column are defined as follows:
– the contents of the flag remain unchanged after the instruction is executed
? the contents of the flag is undefined after the instruction is executed
ü
the flag is updated after the instruction is executed
C-6
Table C-4. Instruction Set (Continued)
Description
Operation
(dest) ← (dest) + (src)
(dest) ← (dest) and (src)
(CF) ← 0
(OF) ← 0
Flags
Affected
ü
AF
ü
CF
DF –
IF –
ü
OF
ü
PF
ü
SF
TF –
ü
ZF
AF ?
ü
CF
DF –
IF –
ü
OF
ü
PF
ü
SF
TF –
ü
ZF
Advertisement
Table of Contents
