Chip-Selects And Bus Hold - Intel 80C186EA User Manual

Hide thumbs Also See for 80C186EA:
Table of Contents

Advertisement

CHIP-SELECT UNIT
6.5

CHIP-SELECTS AND BUS HOLD

The Chip-Select Unit decodes only internally generated address and bus state information. An ex-
ternal bus master cannot make use of the Chip-Select Unit. During HLDA, all chip-selects remain
inactive.
The circuit shown in Figure 6-12 allows an external bus master to access a device during bus
HOLD.
CSU Chip Select
External Master Chip Select
6.6
EXAMPLES
The following sections provide examples of programming the Chip-Select Unit to meet the needs
of a particular application. The examples do not go into hardware analysis or design issues.
6.6.1
Example 1: Typical System Configuration
Figure 6-13 illustrates a block diagram of a typical system design with a 128 Kbyte EPROM and
a 32 Kbyte SRAM. The peripherals are mapped to I/O address space. Example 6.1 shows a pro-
gram template for initializing the Chip-Select Unit.
6-18
Figure 6-12. Using Chip-Selects During HOLD
Device select
A1167-0A

Advertisement

Table of Contents
loading

This manual is also suitable for:

80c188ea

Table of Contents