Intel 80C186EA User Manual page 149

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CLOCK GENERATION AND POWER MANAGEMENT
CLKIN
V cc
CLKOUT
UCS, LCS
MCS3:0
PCS6:0
T0OUT, T1OUT
NPS
HLDA, ALE
A19:16
AD15:0, S2:0
RD, WR, DEN
DT/R, LOCK
RESIN
RESOUT
NOTE: CLKOUT synchronization occurs approximately 1 1/2 CLKIN periods
after RESIN is sampled low.
5-8
V
cc
and CLKIN stable to output valid 28 CLKIN periods (max)
V cc and CLKIN stable to RESIN high,
approximately 32 CLKIN periods.
Figure 5-6. Cold Reset Waveform
RESIN high to
first bus activity,
7 CLKOUT periods.
A1114-0A

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